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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-03 13:52:59 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-03 13:52:59 +0000 |
commit | 783e8322d36a8fd655de2c051e00943806388030 (patch) | |
tree | ac53147a7e82971d51ea87001064b527917828f0 /c/src/lib/libbsp/i386/pc386/startup | |
parent | Fix By Joel based on suggestion from Ian Lance Taylor <ian@airs.com> (diff) | |
download | rtems-783e8322d36a8fd655de2c051e00943806388030.tar.bz2 |
Patch from Eric Valette <valette@crf.canon.fr> to fix interrupt
initialization typo and make i8259s_cache only accessed from C.
Diffstat (limited to 'c/src/lib/libbsp/i386/pc386/startup')
-rw-r--r-- | c/src/lib/libbsp/i386/pc386/startup/ldsegs.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S index 626b465867..24a1042989 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S +++ b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @@ -139,8 +139,6 @@ next_step: outb al, $0x21 /* is cascaded */ call SYM(delay) - movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ - jmp SYM (_establish_stack) # return to the bsp entry code /*-------------------------------------------------------------------------+ |