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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-03 13:52:59 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-03 13:52:59 +0000 |
| commit | 783e8322d36a8fd655de2c051e00943806388030 (patch) | |
| tree | ac53147a7e82971d51ea87001064b527917828f0 | |
| parent | Fix By Joel based on suggestion from Ian Lance Taylor <ian@airs.com> (diff) | |
| download | rtems-783e8322d36a8fd655de2c051e00943806388030.tar.bz2 | |
Patch from Eric Valette <valette@crf.canon.fr> to fix interrupt
initialization typo and make i8259s_cache only accessed from C.
| -rw-r--r-- | c/src/lib/libbsp/i386/pc386/startup/ldsegs.S | 2 | ||||
| -rw-r--r-- | c/src/lib/libbsp/i386/shared/irq/irq.c | 6 |
2 files changed, 3 insertions, 5 deletions
diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S index 626b465867..24a1042989 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S +++ b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @@ -139,8 +139,6 @@ next_step: outb al, $0x21 /* is cascaded */ call SYM(delay) - movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ - jmp SYM (_establish_stack) # return to the bsp entry code /*-------------------------------------------------------------------------+ diff --git a/c/src/lib/libbsp/i386/shared/irq/irq.c b/c/src/lib/libbsp/i386/shared/irq/irq.c index 0a8a7f269c..c618778be0 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq.c +++ b/c/src/lib/libbsp/i386/shared/irq/irq.c @@ -53,7 +53,7 @@ static rtems_irq_connect_data* rtems_hdl_tbl; * while upper bits are interrupt on the slave PIC. * This cache is initialized in ldseg.s */ -rtems_i8259_masks i8259s_cache; +rtems_i8259_masks i8259s_cache = 0xffbf; /*-------------------------------------------------------------------------+ | Function: BSP_irq_disable_at_i8259s @@ -83,7 +83,7 @@ int BSP_irq_disable_at_i8259s (const rtems_irq_symbolic_name irqLine) } else { - outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) > 8)); + outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8)); } _CPU_ISR_Enable (level); @@ -118,7 +118,7 @@ int BSP_irq_enable_at_i8259s (const rtems_irq_symbolic_name irqLine) } else { - outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) > 8)); + outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8)); } _CPU_ISR_Enable (level); |