2011-04-20 Rohan Kangralkar <rkangral@ece.neu.edu>

	PR 1781/bsps
	* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
	preinstall.am, times, console/console.c, include/bsp.h,
	include/cplb.h, include/tm27.h, make/custom/TLL6527M.cfg,
	startup/bspstart.c, startup/linkcmds: New files.
	Initial port for the TLL6527Mboard that contains blackfin 52X
	range of processors. Used eZKit533 as a reference for building
	the port.

14 files changed, 1178 insertions, 0 deletions

diff --git a/c/src/lib/libbsp/bfin/TLL6527M/ChangeLog b/c/src/lib/libbsp/bfin/TLL6527M/ChangeLog
new file mode 100644
index 0000000000..66ca26afd0
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/ChangeLog
@@ -0,0 +1,11 @@
+2011-04-20	Rohan Kangralkar <rkangral@ece.neu.edu>
+
+	PR 1781/bsps
+	* ChangeLog, Makefile.am, README, bsp_specs, configure.ac,
+	preinstall.am, times, console/console.c, include/bsp.h,
+	include/cplb.h, include/tm27.h, make/custom/TLL6527M.cfg,
+	startup/bspstart.c, startup/linkcmds: New files.
+	Initial port for the TLL6527Mboard that contains blackfin 52X
+	range of processors. Used eZKit533 as a reference for building
+	the port.
+
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/Makefile.am b/c/src/lib/libbsp/bfin/TLL6527M/Makefile.am
new file mode 100644
index 0000000000..6b15ad1077
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/Makefile.am
@@ -0,0 +1,52 @@
+##
+## $Id$
+##
+
+ACLOCAL_AMFLAGS = -I ../../../../aclocal
+
+include $(top_srcdir)/../../../../automake/compile.am
+
+include_bspdir = $(includedir)/bsp
+
+dist_project_lib_DATA = bsp_specs
+
+include_HEADERS = include/bsp.h
+include_HEADERS += include/tm27.h
+include_HEADERS += include/cplb.h
+
+nodist_include_HEADERS = include/bspopts.h
+nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
+DISTCLEANFILES = include/bspopts.h
+
+noinst_PROGRAMS =
+
+include_HEADERS += ../../shared/include/coverhd.h
+
+noinst_LIBRARIES = libbspstart.a
+libbspstart_a_SOURCES = ../shared/start/start.S
+project_lib_DATA = start.$(OBJEXT)
+
+dist_project_lib_DATA += startup/linkcmds
+
+noinst_LIBRARIES += libbsp.a
+
+libbsp_a_SOURCES = ../../shared/bsplibc.c ../../shared/bsppost.c \
+	../../shared/bsppredriverhook.c startup/bspstart.c \
+	../../shared/bspclean.c ../../shared/sbrk.c ../../shared/setvec.c \
+	../../shared/bootcard.c ../../shared/gnatinstallhandler.c \
+	../../shared/bspgetworkarea.c
+
+libbsp_a_SOURCES += console/console.c
+
+libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/mmu.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/interrupt.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/cache.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/uart.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/clock.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/rtc.rel
+libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/timer.rel
+
+EXTRA_DIST = times
+
+include $(srcdir)/preinstall.am
+include $(top_srcdir)/../../../../automake/local.am
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/README b/c/src/lib/libbsp/bfin/TLL6527M/README
new file mode 100644
index 0000000000..b6ce46629b
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/README
@@ -0,0 +1,96 @@
+#
+#  $Id$
+#
+
+BSP NAME:           TLL6527M
+BOARD:              TLL6527M 
+CPU FAMILY:         Blackfin
+CPU:                Blackfin 527 
+MODE:               32 bit mode
+
+DEBUG MONITOR:      
+SIMULATOR:          
+
+PERIPHERALS
+===========
+TIMERS:             internal
+  RESOLUTION:         1 milisecond
+SERIAL PORTS:       2 internal UART (polled/interrupt/dma)
+REAL-TIME CLOCK:    internal
+DMA:                internal
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       internal
+TIMER DRIVER:       internal
+I2C:
+SPI:
+PPI:
+SPORT:
+
+
+STDIO
+=====
+PORT:               Console port 1
+ELECTRICAL:         RS-232
+BAUD:               9600
+BITS PER CHARACTER: 8
+PARITY:             None
+STOP BITS:          1
+
+NOTES
+=====
+The TLL56527M board contains analog devices blackfin 527 processor. In addition
+to the peripherals provided by bf527 the board has a temprature sensor, 
+accelerometer and power module connected via I2C. It also has LCD interface,
+Card reader interface.
+
+The analog device bf52X family of processors are different from the bf53x range 
+of processors. This port supports the additional features that are not 
+supported by the blackfin 53X family of processors.
+  
+The TLL6527M does not use the interrupt module used by the bfin 53x since it has
+an additional system interrupt controller isr registers for additional lines.
+On the 53X these line are multiplexed. 
+The centralized interrupt handler is implemented to use lookup tables for 
+jumping to the user ISR. For more details look at files implemented under 
+libcpu/bfin/bf52x/interrupt/*
+
+This port supports only the uart peripheral. The uart is supported via 
+polling, DMA, interrupt. The uart file is generic and is common between the 
+ports. Under bsp configure.ac files 
+* change the CONSOLE_BAUDRATE or to choose among different baudrate.
+* Set UART_USE_DMA for UART to use DMA based transfers. In DMA based transfer
+  chunk of buffer is transmitted at once and then an interrupt is generated.
+* Set CONSOLE_USE_INTERRUPTS to use interrupt based transfers. After every 
+  character is transmitted an interrupt is generated. 
+* If CONSOLE_USE_INTERRUPTS, UART_USE_DMA are both not set then the port uses
+  polling to transmit data over uart. This call is blocking. 
+
+TLL6527 specific file are mentioned below.
+=====================================
+c/src/lib/libcpu/bfin/bf52x/*
+c/src/lib/libbsp/bfin/TLL6527M/*
+
+
+The port was compiled using
+===========================
+1. bfin-rtems4.11-gcc (GCC) 4.5.2 20101216 
+              (RTEMS gcc-4.5.2-3.el5/newlib-1.19.0-1.el5)
+2. automake (GNU automake) 1.11.1
+3. autoconf (GNU Autoconf) 2.68
+
+
+The port was configured using the flags
+========================================== 
+--target=bfin-rtems4.11 --enable-rtemsbsp=TLL6527M --enable-tests=samples 
+--disable-posix --disable-itron 
+       
+
+ISSUES:
+Could not place code in l1code (SRAM) because it was not being loaded by the 
+gnu loaded.
\ No newline at end of file
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/bsp_specs b/c/src/lib/libbsp/bfin/TLL6527M/bsp_specs
new file mode 100644
index 0000000000..378cdf39a3
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/bsp_specs
@@ -0,0 +1,10 @@
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*startfile:
+%{!qrtems: %(old_startfile)} \
+%{!nostdlib: %{qrtems: start.o%s -e __start}}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N}
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/configure.ac b/c/src/lib/libbsp/bfin/TLL6527M/configure.ac
new file mode 100644
index 0000000000..6290fd33f9
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/configure.ac
@@ -0,0 +1,47 @@
+## Process this file with autoconf to produce a configure script.
+## 
+## $Id$
+
+AC_PREREQ(2.68)
+AC_INIT([rtems-c-src-lib-libbsp-bfin-TLL6527M],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+AC_CONFIG_SRCDIR([bsp_specs])
+RTEMS_TOP(../../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
+RTEMS_BSP_CONFIGURE
+
+RTEMS_PROG_CC_FOR_TARGET
+RTEMS_CANONICALIZE_TOOLS
+RTEMS_PROG_CCAS
+
+## bsp-specific options
+RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[1])
+RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
+[The console driver can operate in either polled or interrupt mode.])
+
+RTEMS_BSPOPTS_SET([UART_USE_DMA],[*],[1])
+RTEMS_BSPOPTS_HELP([UART_USE_DMA],
+[The uart driver can operate in dma mode with interrupts. 
+Set to 1 if DMA operation is required ])
+
+RTEMS_BSPOPTS_SET([CONSOLE_BAUDRATE],[*],[9600])
+RTEMS_BSPOPTS_HELP([CONSOLE_BAUDRATE],
+[The baudrate of the console uart.])
+
+RTEMS_BSPOPTS_SET([INTERRUPT_USE_TABLE],[*],[1])
+RTEMS_BSPOPTS_HELP([INTERRUPT_USE_TABLE],
+[Select if INTERRUPT use table or link list])
+
+
+
+RTEMS_BSPOPTS_SET([BFIN_ON_SKYEYE],[*],[0])
+RTEMS_BSPOPTS_HELP([BFIN_ON_SKYEYE],
+[(BSP--Skyeye)
+ If defined, disable features which are not supported on Skyeye.])
+
+RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/console/console.c b/c/src/lib/libbsp/bfin/TLL6527M/console/console.c
new file mode 100644
index 0000000000..93f607f927
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/console/console.c
@@ -0,0 +1,182 @@
+/**
+ *@file console.c
+ *
+ *@brief
+ *  - This file implements uart console for TLL6527M. TLL6527M has BF527 with
+ *  second uart (uart-1) connected to the console.
+ *
+ * Target:   TLL6527v1-0
+ * Compiler:
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ * @author Rohan Kangralkar, ECE, Northeastern University
+ *         (kangralkar.r@husky.neu.edu)
+ *
+ * LastChange:
+ * $Id$
+ *
+ */
+
+#include <rtems.h>
+#include <rtems/libio.h>
+#include <bsp.h>
+#include <rtems/bspIo.h>
+
+#include <bsp/interrupt.h>
+#include <libcpu/uart.h>
+
+/***************************************************
+LOCAL DEFINES
+ ***************************************************/
+
+
+/***************************************************
+STATIC GLOBALS
+ ***************************************************/
+/**
+ * Declaration of UART
+ */
+static bfin_uart_channel_t channels[] = {
+  {"/dev/console",
+    UART1_BASE_ADDRESS,
+    DMA10_BASE_ADDRESS,
+    DMA11_BASE_ADDRESS,
+    CONSOLE_USE_INTERRUPTS,
+    UART_USE_DMA,
+    CONSOLE_BAUDRATE,
+    NULL,
+    0,
+    0}
+};
+
+/**
+ * Over all configuration
+ */
+static bfin_uart_config_t config = {
+    SCLK,
+    sizeof(channels) / sizeof(channels[0]),
+    channels
+};
+
+
+#if CONSOLE_USE_INTERRUPTS
+/**
+ * The Rx and Tx isr will get the same argument
+ * The isr will have to find if it was the rx that caused the interrupt or
+ * the tx
+ */
+static bfin_isr_t bfinUARTISRs[] = {
+#if UART_USE_DMA
+    /* For First uart */
+    {IRQ_DMA10_UART1_RX, bfinUart_rxDmaIsr, (void *)&channels[0], 0},
+    {IRQ_DMA11_UART1_TX, bfinUart_txDmaIsr, (void *)&channels[0], 0},
+    /* For second uart */
+#else
+    /* For First uart */
+    {IRQ_DMA10_UART1_RX, bfinUart_rxIsr, &channels[0], 0},
+    {IRQ_DMA11_UART1_TX, bfinUart_txIsr, &channels[0], 0},
+    /* For second uart */
+#endif
+};
+#endif
+
+
+static void TLL6527_BSP_output_char(char c) {
+
+  bfin_uart_poll_write(0, c);
+}
+
+static int TLL6527_BSP_poll_char(void) {
+
+  return bfin_uart_poll_read(0);
+}
+
+BSP_output_char_function_type     BSP_output_char = TLL6527_BSP_output_char;
+BSP_polling_getchar_function_type BSP_poll_char   = TLL6527_BSP_poll_char;
+
+
+
+rtems_device_driver console_close(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_close(arg);
+}
+
+rtems_device_driver console_read(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_read(arg);
+}
+
+rtems_device_driver console_write(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_write(arg);
+}
+
+rtems_device_driver console_control(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return rtems_termios_ioctl(arg);
+}
+
+
+
+/*
+ *  Open entry point
+ */
+rtems_device_driver console_open(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+
+  return bfin_uart_open(major, minor, arg);
+}
+
+
+
+/**
+ *
+ * This routine initializes the console IO driver.
+ *
+ * Parameters
+ * @param major major number
+ * @param minor minor number
+ *
+ * Output parameters:  NONE
+ *
+ * @return void
+ */
+rtems_device_driver console_initialize(rtems_device_major_number major,
+    rtems_device_minor_number minor,
+    void *arg) {
+  rtems_status_code status = RTEMS_NOT_DEFINED;
+#if CONSOLE_USE_INTERRUPTS
+  int               i      = 0;
+#endif
+
+  status = bfin_uart_initialize(major, &config);
+  if (status != RTEMS_SUCCESSFUL) {
+    rtems_fatal_error_occurred(status);
+  }
+
+#if CONSOLE_USE_INTERRUPTS
+  for (i = 0; i < sizeof(bfinUARTISRs) / sizeof(bfinUARTISRs[0]); i++) {
+    bfin_interrupt_register(&bfinUARTISRs[i]);
+#if INTERRUPT_USE_TABLE
+#else
+    bfin_interrupt_enable(&bfinUARTISRs[i], 1);
+#endif
+  }
+#endif
+
+  return RTEMS_SUCCESSFUL;
+}
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/include/bsp.h b/c/src/lib/libbsp/bfin/TLL6527M/include/bsp.h
new file mode 100644
index 0000000000..9e25a272cd
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/include/bsp.h
@@ -0,0 +1,79 @@
+/**
+ *@file bsp.h
+ *  
+ *  This include file contains all board IO definitions for TLL6527M.
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+ 
+
+#ifndef _BSP_H
+#define _BSP_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <bspopts.h>
+
+#include <rtems.h>
+#include <rtems/console.h>
+#include <rtems/clockdrv.h>
+#include <rtems/score/bfin.h>
+#include <rtems/bfin/bf52x.h>
+#include <bf52x.h>
+
+
+/* 
+ * PLL and clock setup values:
+ */
+
+/*
+ *  PLL configuration for TLL6527M
+ *
+ *  XTL   =  27 MHz
+ *  CLKIN =  13 MHz
+ *  VCO   = 391 MHz
+ *  CCLK  = 391 MHz
+ *  SCLK  = 130 MHz
+ */
+
+#define PLL_CSEL    0x0000      /* CCLK = VCO      */
+#define PLL_SSEL    0x0003      /* SCLK = CCLK/3   */
+#define PLL_MSEL    0x3A00      /* VCO = 29xCLKIN  */
+#define PLL_DF      0x0001      /* CLKIN = XTL/2   */
+
+#define CLKIN		    (25000000)  /* Input clock to the PLL */
+#define CCLK        (600000000)   /* CORE CLOCK     */
+#define SCLK        (100000000)   /* SYSTEM CLOCK   */
+
+/*
+ * UART setup values
+ */
+#define BAUDRATE    57600       /* Console Baudrate   */
+#define WORD_5BITS  0x00        /* 5 bits word        */
+#define WORD_6BITS  0x01        /* 6 bits word        */
+#define WORD_7BITS  0x02        /* 7 bits word        */
+#define WORD_8BITS  0x03        /* 8 bits word        */
+#define EVEN_PARITY 0x18        /* Enable EVEN parity */
+#define ODD_PARITY  0x08        /* Enable ODD parity  */
+#define TWO_STP_BIT 0x04        /* 2 stop bits        */
+
+rtems_isr_entry set_vector(                     /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/include/cplb.h b/c/src/lib/libbsp/bfin/TLL6527M/include/cplb.h
new file mode 100644
index 0000000000..2cac1a48e6
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/include/cplb.h
@@ -0,0 +1,34 @@
+/*  cplb.h
+ *  
+ *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
+ *             written by Alain Schaefer <alain.schaefer@easc.ch>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+#ifndef _CPLB_H
+#define _CPLB_H
+
+/* CPLB configurations */
+#define CPLB_DEF_CACHE_WT	CPLB_L1_CHBL | CPLB_WT
+#define CPLB_DEF_CACHE_WB	CPLB_L1_CHBL 
+#define CPLB_CACHE_ENABLED	CPLB_L1_CHBL | CPLB_DIRTY
+
+#define CPLB_DEF_CACHE		CPLB_L1_CHBL | CPLB_WT
+#define CPLB_ALL_ACCESS	CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR
+
+#define CPLB_I_PAGE_MGMT	CPLB_LOCK | CPLB_VALID
+#define CPLB_D_PAGE_MGMT	CPLB_LOCK | CPLB_ALL_ACCESS | CPLB_VALID
+
+#define CPLB_DNOCACHE		CPLB_ALL_ACCESS | CPLB_VALID
+#define CPLB_DDOCACHE		CPLB_DNOCACHE | CPLB_DEF_CACHE
+#define CPLB_INOCACHE   	CPLB_USER_RD | CPLB_VALID
+#define CPLB_IDOCACHE   	CPLB_INOCACHE | CPLB_L1_CHBL
+
+#define CPLB_DDOCACHE_WT	CPLB_DNOCACHE | CPLB_DEF_CACHE_WT
+#define CPLB_DDOCACHE_WB	CPLB_DNOCACHE | CPLB_DEF_CACHE_WB
+
+#endif /* _CPLB_H */
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/include/tm27.h b/c/src/lib/libbsp/bfin/TLL6527M/include/tm27.h
new file mode 100644
index 0000000000..8e126bf1ba
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/include/tm27.h
@@ -0,0 +1,37 @@
+/*
+ *  tm27.h
+ *
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+
+#ifndef _RTEMS_TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector(handler) \
+{ \
+  set_vector( handler, 0x06, 1 ); \
+}
+
+#define Cause_tm27_intr() asm volatile("raise 0x06;" : :);
+
+#define Clear_tm27_intr() /* empty */
+
+#define Lower_tm27_intr() /* empty */
+
+#endif
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/make/custom/TLL6527M.cfg b/c/src/lib/libbsp/bfin/TLL6527M/make/custom/TLL6527M.cfg
new file mode 100644
index 0000000000..7d8ae7d8bb
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/make/custom/TLL6527M.cfg
@@ -0,0 +1,19 @@
+#
+#  Config file for Blackfin TLL6527M
+#
+#  $Id$
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU=bfin
+RTEMS_CPU_MODEL=bf52x
+
+#  This contains the compiler options necessary to select the CPU model
+#  and (hopefully) optimize for it. 
+#
+CPU_CFLAGS =-mcpu=bf527
+
+# optimize flag: typically -O2
+# gcc-4.2.0 segfaults on -OX > -O0
+CFLAGS_OPTIMIZE_V = -O2 -g
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/preinstall.am b/c/src/lib/libbsp/bfin/TLL6527M/preinstall.am
new file mode 100644
index 0000000000..557599a694
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/preinstall.am
@@ -0,0 +1,71 @@
+## Automatically generated by ampolish3 - Do not edit
+
+if AMPOLISH3
+$(srcdir)/preinstall.am: Makefile.am
+	$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
+endif
+
+PREINSTALL_DIRS =
+DISTCLEANFILES += $(PREINSTALL_DIRS)
+
+all-local: $(TMPINSTALL_FILES)
+
+TMPINSTALL_FILES =
+CLEANFILES = $(TMPINSTALL_FILES)
+
+all-am: $(PREINSTALL_FILES)
+
+PREINSTALL_FILES =
+CLEANFILES += $(PREINSTALL_FILES)
+
+$(PROJECT_LIB)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_LIB)
+	@: > $(PROJECT_LIB)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)
+	@: > $(PROJECT_INCLUDE)/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
+
+$(PROJECT_INCLUDE)/bsp/$(dirstamp):
+	@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
+	@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+
+$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
+PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
+
+$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
+
+$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
+
+$(PROJECT_INCLUDE)/cplb.h: include/cplb.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/cplb.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/cplb.h
+
+$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
+
+$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
+
+$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
+
+$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
+TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
+
+$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
+
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/startup/bspstart.c b/c/src/lib/libbsp/bfin/TLL6527M/startup/bspstart.c
new file mode 100644
index 0000000000..618bd83e8b
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/startup/bspstart.c
@@ -0,0 +1,207 @@
+/*  bspstart.c for TLL6527M
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *  
+ * COPYRIGHT (c) 2010 by ECE Northeastern University.
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license
+ *
+ *  $Id$
+ */
+
+
+#include <bsp.h>
+#include <cplb.h>
+#include <bsp/interrupt.h>
+#include <libcpu/ebiuRegs.h>
+
+const unsigned int dcplbs_table[16][2] = {  
+  { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
+  { 0xFF900000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },/* L1 Data B */
+  { 0xFF800000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },/* L1 Data A */
+  { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },
+
+  { 0x20300000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 3 */
+  { 0x20200000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 2  */
+  { 0x20100000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) },/* Async Memory Bank 1 */
+  { 0x20000000, (PAGE_SIZE_1MB | CPLB_DNOCACHE) }, /* Async Memory Bank 0 */
+
+  { 0x02400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x02000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00C00000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00800000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00400000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+  { 0x00000000, (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
+
+  { 0xffffffff, 0xffffffff }/* end of section - termination */
+};
+
+
+const unsigned int _icplbs_table[16][2] = { 
+  { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },
+  /* L1 Code */
+  { 0xEF000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* AREA DE BOOT */
+  { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },
+
+  { 0x20300000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Memory Bank 3 */
+  { 0x20200000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 2 (Secnd) */
+  { 0x20100000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 1 (Prim B) */
+  { 0x20000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) },/* Async Bank 0 (Prim A) */
+
+  { 0x02400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x02000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00C00000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00800000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00400000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+  { 0x00000000, (PAGE_SIZE_4MB | CPLB_INOCACHE) },
+
+  { 0xffffffff, 0xffffffff }/* end of section - termination */
+};
+
+/*
+ *  Use the shared implementations of the following routines
+ */
+
+void bsp_libc_init( void *, uint32_t, int );
+void Init_PLL (void);
+void Init_EBIU (void);
+void Init_Flags(void);
+void Init_RTC (void);
+void initCPLB(void);
+
+
+void null_isr(void);
+
+/*
+ *  Function:   bsp_pretasking_hook
+ *  Created:    95/03/10
+ *
+ *  Description:
+ *      BSP pretasking hook.  Called just before drivers are initialized.
+ *      Used to setup libc and install any BSP extensions.
+ *
+ *  NOTES:
+ *      Must not use libc (to do io) from here, since drivers are
+ *      not yet initialized.
+ *
+ */
+
+void bsp_pretasking_hook(void)
+{
+  bfin_interrupt_init();
+}
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+  /* BSP Hardware Initialization*/
+  Init_RTC();   /* Blackfin Real Time Clock initialization */  
+  Init_PLL();   /* PLL initialization */
+  Init_EBIU();  /* EBIU initialization */
+  Init_Flags(); /* GPIO initialization */
+
+  /*
+   *  Allocate the memory for the RTEMS Work Space.  This can come from
+   *  a variety of places: hard coded address, malloc'ed from outside
+   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
+   *  typically done by stock BSPs) by subtracting the required amount
+   *  of work space from the last physical address on the CPU board.
+   */
+  int i=0;
+  for (i=5;i<16;i++) {
+    set_vector((rtems_isr_entry)null_isr, i, 1);
+  }
+  
+}
+
+ /*
+  * Init_PLL
+  * 
+  * Routine to initialize the PLL. The TLL6527M uses a 25 Mhz XTAL.
+  */
+void Init_PLL (void)
+{
+  unsigned short msel = 0;
+  unsigned short ssel = 0;
+
+  msel = (unsigned short)( (float)CCLK/(float)CLKIN );
+  ssel = (unsigned short)( (float)(CLKIN*msel)/(float)SCLK);
+  
+  asm("cli r0;");
+
+  *((uint32_t*)SIC_IWR) = 0x1;
+
+  /* Configure PLL registers */
+  *((uint16_t*)PLL_DIV) = ssel;;
+  msel = msel<<9;
+  *((uint16_t*)PLL_CTL) = msel;
+
+  /* Commands to set PLL values */
+  asm("idle;");
+  asm("sti r0;");
+}
+
+ /*
+  * Init_EBIU
+  * 
+  * Configure extern memory
+  */
+
+void Init_EBIU (void)
+{
+  /* Check if SDRAM is already enabled */
+  if ( 0 != (*(uint16_t *)EBIU_SDSTAT & EBIU_SDSTAT_SDRS) ){
+    asm("ssync;");
+    /* RDIV = (100MHz*64ms)/8192-(6+3)=0x406 cycles */
+    *(uint16_t *)EBIU_SDRRC  = 0x3F6; /* SHould have been 0x306*/
+    *(uint16_t *)EBIU_SDBCTL = EBIU_SDBCTL_EBCAW_10 | EBIU_SDBCTL_EBSZ_64M |
+        EBIU_SDBCTL_EBE;
+    *(uint32_t *)EBIU_SDGCTL = 0x8491998d;
+    asm("ssync;");
+  } else {
+    /* SDRAm is already programmed */
+  }
+}
+
+ /*
+  * Init_Flags
+  * 
+  * Enable LEDs port
+  */
+void Init_Flags(void)
+{
+  *((uint16_t*)PORTH_FER)    = 0x0;
+  *((uint16_t*)PORTH_MUX)    = 0x0;
+  *((uint16_t*)PORTHIO_DIR)  = 0x1<<15;
+  *((uint16_t*)PORTHIO_SET)  = 0x1<<15;
+}
+
+
+
+void initCPLB(void) {
+
+       int i = 0;
+       unsigned int *addr;
+       unsigned int *data;
+        
+       addr = (unsigned int *)0xffe00100;
+       data = (unsigned int *)0xffe00200;
+
+       while ( dcplbs_table[i][0] != 0xffffffff ) {
+               *addr = dcplbs_table[i][0];
+               *data = dcplbs_table[i][1];
+
+               addr++;
+               data++;
+       } 
+}
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/startup/linkcmds b/c/src/lib/libbsp/bfin/TLL6527M/startup/linkcmds
new file mode 100644
index 0000000000..a556d4bc67
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/startup/linkcmds
@@ -0,0 +1,154 @@
+OUTPUT_FORMAT("elf32-bfin", "elf32-bfin",
+            "elf32-bfin")
+
+OUTPUT_ARCH(bfin)
+ENTRY(__start)
+
+/*
+ * Declare some sizes.
+ */
+_RamBase    = DEFINED(_RamBase)   ? _RamBase : 0x0;
+_RamSize    = DEFINED(_RamSize)   ? _RamSize : 0x04000000;
+_HeapSize   = DEFINED(_HeapSize)  ? _HeapSize : 0x10000;
+_StackSize  = DEFINED(_StackSize) ? _StackSize : 0x10000;
+
+MEMORY
+{
+      sdram(rwx)      : ORIGIN = 0x00000100, LENGTH = 0x04000000
+      
+      l1dataA(rwx)    : ORIGIN = 0xff800000, LENGTH = 0x00004000
+      l1dataAC(rwx)   : ORIGIN = 0xff804000, LENGTH = 0x00004000
+      l1dataB(rwx)    : ORIGIN = 0xff900000, LENGTH = 0x00004000
+      l1dataBC(rwx)   : ORIGIN = 0xff904000, LENGTH = 0x00004000
+      
+      l1code(rwx)     : ORIGIN = 0xffa00000, LENGTH = 0x0000C000
+      l1codeC(rwx)    : ORIGIN = 0xffa10000, LENGTH = 0x00004000
+      scratchpad(rwx) : ORIGIN = 0xffb00000, LENGTH = 0x00001000
+}
+
+SECTIONS
+{
+
+    .init          : 
+    { 
+    	*(.l1code)
+        KEEP (*(.init))
+    } > sdram   /*=0*/
+
+    .text :
+    {
+         CREATE_OBJECT_SYMBOLS
+        *(.text)
+        *(.rodata*)
+        *(.gnu.linkonce.r*)
+        
+        /*
+         * Special FreeBSD sysctl sections.
+         */
+        . = ALIGN (16);
+        ___start_set_sysctl_set = .;
+        *(set_sysctl_*);
+        ___stop_set_sysctl_set = ABSOLUTE(.);
+        *(set_domain_*);
+        *(set_pseudo_*);
+
+         _etext = .;
+
+        ___CTOR_LIST__ = .;
+        LONG((___CTOR_END__ - ___CTOR_LIST__) / 4 - 2)
+        *(.ctors)
+        LONG(0)
+        ___CTOR_END__ = .;
+        ___DTOR_LIST__ = .;
+        LONG((___DTOR_END__ - ___DTOR_LIST__) / 4 - 2)
+        *(.dtors)
+        LONG(0)
+        ___DTOR_END__ = .;         
+    } > sdram
+    
+    .fini :
+    {
+        KEEP (*(.fini))
+    } > sdram  /*=0*/ 
+    
+    .data :
+    {
+        *(.data)
+        *(.jcr)
+        *(.gnu.linkonce.d*)
+        CONSTRUCTORS
+         _edata = .;
+    } > sdram
+
+    .eh_frame : { *(.eh_frame) } > sdram
+    .data1   : { *(.data1) } > sdram
+    .eh_frame : { *(.eh_frame) } > sdram
+    .gcc_except_table : { *(.gcc_except_table*) } > sdram
+
+    .rodata :
+    {
+        *(.rodata)
+        *(.rodata.*)
+        *(.gnu.linkonce.r*)
+    } > sdram
+
+    
+    .bss :
+    {
+         _bss_start = .;
+        _clear_start = .;
+        *(.bss)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN (64);
+        _stack_init = .;
+        . += _StackSize;
+        _clear_end = .;
+        _WorkAreaBase = .;
+         _end = .;
+         __end = .;
+    } > sdram
+    
+/* Debugging stuff follows */
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) } 
+  .stabstr 0 : { *(.stabstr) } 
+  .stab.excl 0 : { *(.stab.excl) } 
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) } 
+  .stab.indexstr 0 : { *(.stab.indexstr) } 
+  .comment 0 : { *(.comment) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) } 
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) } 
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) } 
+  /*.stack 0x80000 : { _stack = .; *(.stack) }*/
+  /* These must appear regardless of  .  */   
+}
+
+__HeapSize = _HeapSize;
+__edata = _edata;
+__etext = _etext;
+
diff --git a/c/src/lib/libbsp/bfin/TLL6527M/times b/c/src/lib/libbsp/bfin/TLL6527M/times
new file mode 100644
index 0000000000..47b1b85519
--- /dev/null
+++ b/c/src/lib/libbsp/bfin/TLL6527M/times
@@ -0,0 +1,179 @@
+#
+#  Timing Test Suite Results for TLL6527M
+#
+#
+#  $Id$
+#
+
+Board: TLL6527M 
+CPU: Blackfin 527
+Clock Speed: 600 MHz
+Memory Configuration: SDRAM 100 MHz
+
+
+*** TIME TEST 1 ***
+rtems_semaphore_create 8
+rtems_semaphore_delete 4
+rtems_semaphore_obtain: available 0
+rtems_semaphore_obtain: not available -- NO_WAIT 0
+rtems_semaphore_release: no waiting tasks 1
+*** END OF TEST 1 ***
+
+
+*** TIME TEST 2 ***
+rtems_semaphore_obtain: not available -- caller blocks 8
+*** END OF TEST 2 ***
+
+
+*** TIME TEST 3 ***
+
+*** TIME TEST 4 ***
+
+*** TIME TEST 5 ***
+
+*** TIME TEST 6 ***
+rtems_task_restart: calling task 3
+rtems_task_suspend: returns to caller 1
+rtems_task_resume: task readied -- returns to caller 1
+rtems_task_delete: ready task 15
+*** END OF TEST 6 ***
+
+*** TIME TEST 7 ***
+
+
+*** TIME TEST 8 ***
+rtems_task_set_priority: obtain current priorityrtems_task_mode: reschedule -- preempts caller 0   
+rtems_task_set_priority: returns to caller  2
+rtems_task_mode: obtain current mode101 0
+rtems_task_mode: no reschedule 0
+rtems_task_mode: reschedule -- returns to caller
+ 2
+rtems_task_set_note 1
+rtems_task_get_note 0
+rtems_clock_set 2
+rtems_clock_get_tod 12
+*** END OF TEST 8 ***
+
+
+*** TIME TEST 9 ***
+rtems_message_queue_create 43
+rtems_message_queue_send: no waiting tasks 2
+rtems_message_queue_urgent: no waiting tasks 2
+rtems_message_queue_receive: available 2
+rtems_message_queue_flush: no messages flushed 0
+rtems_message_queue_flush: messages flushed 1
+rtems_message_queue_delete 8
+*** END OF TEST 9 ***
+
+*** TIME TEST 10 ***
+rtems_message_queue_receive: not available -- NO_WAITrtems_message_queue_receive: not available -- caller blocks 1
+ 8
+*** END OF TEST 10 ***
+
+*** TIME TEST 11 ***
+
+*** TIME TEST 12 ***
+
+*** TIME TEST 13 ***
+
+*** TIME TEST 14 ***
+
+*** TIME TEST 15 ***
+rtems_event_receive: obtain current eventsrtems_event_receive: not available -- caller blocks  07  
+
+rtems_event_receive: not available -- NO_WAITrtems_event_send: n
+
+
+
+*** TIME TEST 16 ***
+
+*** TIME TEST 17 ***
+     
+     
+*** TIME TEST 18 ***
+rtems_task_delete: calling task 22
+*** END OF TEST 18 ***
+
+
+*** TIME TEST 19 ***
+rtems_signal_catch 1
+rtems_signal_send: returns to caller 2
+rtems_signal_send: signal to self 8
+exi
+
+
+
+*** TIME TEST 20 ***                                                                               
+rtems_partition_create 12                                                                          
+rtems_region_creatertems_region_get_segment: not available -- caller blocks 15 
+rtems_partition_get_buffer: available 3
+rtems_partition_get_buffer: not available15 1
+rtems_partition_return_buffer 2
+
+rtems_partition_delete 2
+rtems_region_get_segment: available 5rtems_region_return_segment: task readied -- returns to caller
+ rtems_region_get_segment: not available -- NO_WAIT 5
+rtems_region_return_segment: no waiting tasks3 4
+
+Ack! Something bad happened to the Blackfin!
+
+SEQUENCER STATUS:
+ SEQSTAT: 0000c021  IPEND: 8068  SYSCFG: 0006
+  HWERRCAUSE: 0x3: external memory addressing error
+  EXCAUSE   : 0x21: undef inst
+  physical IVG6 asserted : <0x00009542> /* unknown address */
+  physical IVG15 asserted : <0x00009690> /* unknown address */
+ RETE: <0x00000100> /* unknown address */
+ RETN: <0x92a330ab> { ___smulsi3_highpart + 0x8ead486f }
+ RETX: <0x12001940> { ___smulsi3_highpart + 0xe0a3104 }
+ RETS: <0x000095fa> /* unknown address */
+ RETI: <0x0d48338c> { ___smulsi3_highpart + 0x9524b50 }
+DCPLB_FAULT_ADDR: <0x000318f0> /* unknown address */
+ICPLB_FAULT_ADDR: <0x12001940> { ___smulsi3_highpart + 0xe0a3104 }
+ 
+ 
+
+*** TIME TEST 21 ***                                                                               
+
+rtems_region_create FAILED -- expected (successful completion) got (address specified is invalid)
+
+*** TIME TEST 22 ***
+
+*** TIME TEST 23 ***
+
+
+*** TIME TEST 24 ***
+    
+    
+*** TIME TEST 25 ***
+rtems_clock_tick 5
+*** END OF TEST 25 ***
+
+
+*** TIME TEST 26 ***
+
+*** TIME TEST 27 ***
+interrupt entry overhead: returns to interrupted taskinterrupt entry overhead: returns to preempting task  22
+
+interrupt exit overhead: returns to interrupted task
+
+
+*** TIME TEST 28 ***
+rtems_port_create 1
+rtems_port_external_to_internal 0
+rtems_port_internal_to_external 0
+rtems_port_delete 1
+*** END OF TEST 28 ***
+
+
+*** TIME TEST 29 ***
+rtems_rate_monotonic_create 6
+rtems_rate_monotonic_period: initiate period -- returns to caller 10
+rtems_rate_monotonic_period: obtain status 2
+rtems_rate_monotonic_cancel 3
+rtems_rate_monotonic_delete: inactive 6
+rtems_rate_monotonic_delete: active 3
+rtems_rate_monotonic_period: conclude periods -- caller blocks 9
+*** END OF TEST 29 ***
+
+         
\ No newline at end of file