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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 10:43:04 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-04-21 10:43:04 +0000
commit6128a4aa5e791ed4e0a655bfd346a52d92da7883 (patch)
treeaf53ca3f67ce405b6fbc6c98399c8e0c87e01a9e /c/src/lib/libbsp/arm
parent2004-04-20 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-6128a4aa5e791ed4e0a655bfd346a52d92da7883.tar.bz2
Remove stray white spaces.
Diffstat (limited to 'c/src/lib/libbsp/arm')
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h12
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h4
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S26
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c2
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c8
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h12
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S44
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c22
-rw-r--r--c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c2
-rw-r--r--c/src/lib/libbsp/arm/armulator/console/console-io.c2
-rw-r--r--c/src/lib/libbsp/arm/armulator/include/bsp.h2
-rw-r--r--c/src/lib/libbsp/arm/armulator/start/start.S28
-rw-r--r--c/src/lib/libbsp/arm/armulator/startup/bspstart.c10
-rw-r--r--c/src/lib/libbsp/arm/armulator/startup/libcfunc.c2
-rw-r--r--c/src/lib/libbsp/arm/armulator/startup/syscalls.c14
-rw-r--r--c/src/lib/libbsp/arm/armulator/startup/trap.S2
-rw-r--r--c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c2
-rw-r--r--c/src/lib/libbsp/arm/edb7312/console/uart.c16
-rw-r--r--c/src/lib/libbsp/arm/edb7312/include/bsp.h10
-rw-r--r--c/src/lib/libbsp/arm/edb7312/include/ep7312.h2
-rw-r--r--c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S10
-rw-r--r--c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c2
-rw-r--r--c/src/lib/libbsp/arm/edb7312/irq/irq.c20
-rw-r--r--c/src/lib/libbsp/arm/edb7312/irq/irq.h12
-rw-r--r--c/src/lib/libbsp/arm/edb7312/network/network.c14
-rw-r--r--c/src/lib/libbsp/arm/edb7312/start/start.S56
-rw-r--r--c/src/lib/libbsp/arm/edb7312/startup/bspstart.c28
-rw-r--r--c/src/lib/libbsp/arm/edb7312/startup/exit.c2
-rw-r--r--c/src/lib/libbsp/arm/edb7312/timer/timer.c4
-rw-r--r--c/src/lib/libbsp/arm/shared/comm/console.c88
-rw-r--r--c/src/lib/libbsp/arm/shared/comm/uart.c102
-rw-r--r--c/src/lib/libbsp/arm/shared/comm/uart.h10
-rw-r--r--c/src/lib/libbsp/arm/shared/irq/irq_asm.S40
-rw-r--r--c/src/lib/libbsp/arm/shared/irq/irq_init.c8
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/include/bsp.h12
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/include/registers.h28
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S22
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c4
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/irq.c16
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/irq/irq.h12
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/start/start.S76
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c22
-rw-r--r--c/src/lib/libbsp/arm/vegaplus/startup/exit.c2
43 files changed, 406 insertions, 406 deletions
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h b/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h
index 119c7c133c..761b5f3604 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/include/bsp.h
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
-| bsp.h - ARM BSP
+| bsp.h - ARM BSP
+--------------------------------------------------------------------------+
| This include file contains definitions related to the ARM BSP.
+--------------------------------------------------------------------------+
@@ -10,7 +10,7 @@
| The license and distribution terms for this file may be
| found in found in the file LICENSE in this distribution or at
| http://www.rtems.com/license/LICENSE.
-|
+|
| $Id$
+--------------------------------------------------------------------------*/
@@ -28,7 +28,7 @@ extern "C" {
#include <rtems/iosupp.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
-
+
/*
* Define the interrupt mechanism for Time Test 27
*
@@ -38,11 +38,11 @@ extern "C" {
#define MUST_WAIT_FOR_INTERRUPT 0
-#define Install_tm27_vector( handler )
+#define Install_tm27_vector( handler )
-#define Cause_tm27_intr()
+#define Cause_tm27_intr()
-#define Clear_tm27_intr()
+#define Clear_tm27_intr()
#define Lower_tm27_intr()
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h b/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h
index ca720a04f2..3b11c3856f 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/include/registers.h
@@ -12,10 +12,10 @@
#ifndef __REGS_H__
-#define __REGS_H__
+#define __REGS_H__
/*
- * VARIABLE DECLARATION
+ * VARIABLE DECLARATION
*/
#ifndef __asm__
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S
index 7ff7abb785..311578d50e 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_asm.S
@@ -15,33 +15,33 @@
#define __asm__
#include <registers.h>
-
-/*
- * Function to obtain, execute an IT handler and acknowledge the IT
+
+/*
+ * Function to obtain, execute an IT handler and acknowledge the IT
*/
.globl ExecuteITHandler
-
-ExecuteITHandler :
+
+ExecuteITHandler :
/*
- * Here is the code to execute the appropriate INT handler
+ * Here is the code to execute the appropriate INT handler
*/
-
+
mov pc, r0
-#if 0
-/*
- * Function to acknowledge the IT controller
+#if 0
+/*
+ * Function to acknowledge the IT controller
*/
.globl AckControler
-
-AckControler:
+
+AckControler:
/*
* Here is the code to acknowledge the PIC
*/
-
+
b ReturnFromAck /* return to ISR handler */
#endif
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c
index c981def87b..f307a4171c 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/bsp_irq_init.c
@@ -23,5 +23,5 @@ void BSP_rtems_irq_mngt_init() {
* Here is the code to initialize the INT for
* the specified BSP
*/
-
+
}
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c
index 5b662fb1ee..7a0c222110 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.c
@@ -40,7 +40,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
if (*(HdlTable + irq->name) != default_int_handler) {
return 0;
}
-
+
_CPU_ISR_Disable(level);
/*
@@ -74,7 +74,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -97,7 +97,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
* restore the default irq value
*/
*(HdlTable + irq->name) = default_int_handler;
-
+
_CPU_ISR_Enable(level);
return 1;
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h
index 50e35fe0bc..d773e43161 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/irq/irq.h
@@ -22,7 +22,7 @@ extern "C" {
/*
* Include some preprocessor value also used by assember code
*/
-
+
#include <rtems.h>
extern void default_int_handler();
@@ -39,9 +39,9 @@ typedef enum {
} rtems_irq_symbolic_name;
/* define that can be useful (the values are just examples) */
-#define INTMASK 0x01
+#define INTMASK 0x01
#define VECTOR_TABLE 0x00
-
+
/*
* Type definition for RTEMS managed interrupts
*/
@@ -71,9 +71,9 @@ typedef struct __rtems_irq_connect_data__ {
* It is usually called immediately AFTER connecting the interrupt handler.
* RTEMS may well need such a function when restoring normal interrupt
* processing after a debug session.
- *
+ *
*/
- rtems_irq_enable on;
+ rtems_irq_enable on;
/*
* function for disabling interrupts at device level (ONLY!).
* The code will disable it at i8259s level. RATIONALE : anyway
@@ -143,7 +143,7 @@ void BSP_rtems_irq_mngt_init();
* 4) perform rescheduling when necessary,
* 5) restore the C scratch registers...
* 6) restore initial execution flow
- *
+ *
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*);
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
index c68fcfb076..6e9db56afe 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/start/start.S
@@ -14,7 +14,7 @@
.equ IRQ_Stack, 0x100
.equ FIQ_Stack, 0x200
.equ SVC_Stack, 0x300
-
+
/* Some standard definitions...*/
.equ Mode_USR, 0x10
@@ -33,20 +33,20 @@
.text
.globl _start
-
+
_start:
/*
* Here is the code to initialize the low-level BSP environment
* (Chip Select, PLL, ....?)
-
+
/* Copy data from FLASH to RAM */
LDR r0, =_initdata /* load address of region */
LDR r1, =0x400000 /* execution address of region */
LDR r2, =_edata /* copy execution address into r2 */
-copy:
+copy:
CMP r1, r2 /* loop whilst r1 < r2 */
LDRLO r3, [r0], #4
STRLO r3, [r1], #4
@@ -55,15 +55,15 @@ copy:
/* zero the bss */
LDR r1, =__bss_end__ /* get end of ZI region */
LDR r0, =__bss_start__ /* load base address of ZI region */
-zi_init:
+zi_init:
MOV r2, #0
CMP r0, r1 /* loop whilst r0 < r1 */
STRLOT r2, [r0], #4
- BLO zi_init
+ BLO zi_init
+
-
/* Load basic ARM7 interrupt table */
-VectorInit:
+VectorInit:
MOV R8, #0
ADR R9, Vector_Init_Block
LDMIA R9!, {R0-R7} /* Copy the Vectors (8 words) */
@@ -75,10 +75,10 @@ VectorInit:
/*******************************************************
standard exception vectors table
- *** Must be located at address 0
-********************************************************/
+ *** Must be located at address 0
+********************************************************/
-Vector_Init_Block:
+Vector_Init_Block:
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
@@ -89,36 +89,36 @@ Vector_Init_Block:
LDR PC, FIQ_Addr
.globl Reset_Addr
-Reset_Addr: .long _start
+Reset_Addr: .long _start
Undefined_Addr: .long Undefined_Handler
SWI_Addr: .long SWI_Handler
Prefetch_Addr: .long Prefetch_Handler
Abort_Addr: .long Abort_Handler
- .long 0
+ .long 0
IRQ_Addr: .long IRQ_Handler
FIQ_Addr: .long FIQ_Handler
-
+
/* The following handlers do not do anything useful */
.globl Undefined_Handler
-Undefined_Handler:
+Undefined_Handler:
B Undefined_Handler
.globl SWI_Handler
-SWI_Handler:
- B SWI_Handler
+SWI_Handler:
+ B SWI_Handler
.globl Prefetch_Handler
-Prefetch_Handler:
+Prefetch_Handler:
B Prefetch_Handler
.globl Abort_Handler
-Abort_Handler:
+Abort_Handler:
B Abort_Handler
.globl IRQ_Handler
-IRQ_Handler:
+IRQ_Handler:
B IRQ_Handler
.globl FIQ_Handler
-FIQ_Handler:
+FIQ_Handler:
B FIQ_Handler
-init2 :
+init2 :
/* --- Initialise stack pointer registers
Set up the ABORT stack pointer last and stay in SVC mode */
MOV r0, #(Mode_ABORT | I_Bit | F_Bit) /* No interrupts */
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c
index a5e4099bcd..ecef2a0d96 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/bspstart.c
@@ -1,7 +1,7 @@
/*-------------------------------------------------------------------------+
| This file contains the ARM BSP startup package. It includes application,
| board, and monitor specific initialization and configuration. The generic CPU
-| dependent initialization has been performed before this routine is invoked.
+| dependent initialization has been performed before this routine is invoked.
+--------------------------------------------------------------------------+
|
| Copyright (c) 2000 Canon Research Centre France SA.
@@ -30,11 +30,11 @@
volatile unsigned long *Regs = (unsigned long*)0xdeadbeef; /* Chip registers */
extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */
-/*
- * Size of heap if it is 0 it will be dynamically defined by memory size,
- * otherwise the value should be changed by binary patch
+/*
+ * Size of heap if it is 0 it will be dynamically defined by memory size,
+ * otherwise the value should be changed by binary patch
*/
-uint32_t _heap_size = 0;
+uint32_t _heap_size = 0;
/* Size of stack used during initialization. Defined in 'start.s'. */
extern uint32_t _stack_size;
@@ -67,7 +67,7 @@ void bsp_postdriver_hook(void);
| since drivers are not yet initialized.
| Global Variables: None.
| Arguments: None.
-| Returns: Nothing.
+| Returns: Nothing.
+--------------------------------------------------------------------------*/
void bsp_pretasking_hook(void)
{
@@ -76,9 +76,9 @@ void bsp_pretasking_hook(void)
{
_heap_size = 0x420000 - rtemsFreeMemStart;
}
-
+
bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0);
-
+
rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */
@@ -89,14 +89,14 @@ void bsp_pretasking_hook(void)
#endif /* RTEMS_DEBUG */
} /* bsp_pretasking_hook */
-
+
/*-------------------------------------------------------------------------+
| Function: bsp_start
| Description: Called before main is invoked.
| Global Variables: None.
| Arguments: None.
-| Returns: Nothing.
+| Returns: Nothing.
+--------------------------------------------------------------------------*/
void bsp_start_default( void )
{
@@ -116,7 +116,7 @@ void bsp_start_default( void )
/* Place RTEMS workspace at beginning of free memory. */
BSP_Configuration.work_space_start = (void *)rtemsFreeMemStart;
-
+
rtemsFreeMemStart += BSP_Configuration.work_space_size;
/*
diff --git a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c
index 447a34301e..a99faeb9ba 100644
--- a/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c
+++ b/c/src/lib/libbsp/arm/arm_bare_bsp/startup/exit.c
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
-| exit.c - ARM BSP
+| exit.c - ARM BSP
+--------------------------------------------------------------------------+
| Routines to shutdown and reboot the BSP.
+--------------------------------------------------------------------------+
diff --git a/c/src/lib/libbsp/arm/armulator/console/console-io.c b/c/src/lib/libbsp/arm/armulator/console/console-io.c
index cf844d1c79..3151e3fe20 100644
--- a/c/src/lib/libbsp/arm/armulator/console/console-io.c
+++ b/c/src/lib/libbsp/arm/armulator/console/console-io.c
@@ -55,7 +55,7 @@ void console_outbyte_polled(
}
/*
- * console_inbyte_nonblocking
+ * console_inbyte_nonblocking
*
* This routine polls for a character.
*/
diff --git a/c/src/lib/libbsp/arm/armulator/include/bsp.h b/c/src/lib/libbsp/arm/armulator/include/bsp.h
index 02aae789f6..680bec84b8 100644
--- a/c/src/lib/libbsp/arm/armulator/include/bsp.h
+++ b/c/src/lib/libbsp/arm/armulator/include/bsp.h
@@ -68,7 +68,7 @@ extern rtems_configuration_table BSP_Configuration;
/*
* NOTE: Use the standard Console driver entry
*/
-
+
/*
* NOTE: Use the standard Clock driver entry
*/
diff --git a/c/src/lib/libbsp/arm/armulator/start/start.S b/c/src/lib/libbsp/arm/armulator/start/start.S
index 191aa8d436..bd725115f1 100644
--- a/c/src/lib/libbsp/arm/armulator/start/start.S
+++ b/c/src/lib/libbsp/arm/armulator/start/start.S
@@ -59,11 +59,11 @@ _mainCRTStartup:
mov a2, #0 /* Second arg: fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for Thumb */
-
+
ldr a1, .LC1 /* First arg: start of memory block */
- ldr a3, .LC2
+ ldr a3, .LC2
sub a3, a3, a1 /* Third arg: length of block */
-
+
#ifdef __thumb__ /* Enter Thumb mode.... */
@@ -73,9 +73,9 @@ _mainCRTStartup:
.code 16
.global __change_mode
.thumb_func
-__change_mode:
+__change_mode:
#endif
-
+
bl FUNCTION (memset)
#if !defined (ARM_RDP_MONITOR) && !defined (ARM_RDI_MONITOR)
mov r0, #0 /* no arguments */
@@ -83,9 +83,9 @@ __change_mode:
#else
/* Need to set up standard file handles */
bl FUNCTION (initialize_monitor_handles)
-
+
/* XXX for now let's just get the code up :) */
-#if 0
+#if 0
#ifdef ARM_RDP_MONITOR
swi SWI_GetEnv /* sets r0 to point to the command line */
mov r1, r0
@@ -171,7 +171,7 @@ __change_mode:
str r4, [r3]
add r3, #4
b .LC15
-.LC14:
+.LC14:
#else
add r2, sp, r0, LSL #2 /* End of args */
mov r3, sp /* Start of args */
@@ -206,10 +206,10 @@ change_back:
*/
swi SWI_Exit
#endif
-
- /* For Thumb, constants must be after the code since only
+
+ /* For Thumb, constants must be after the code since only
positive offsets are supported for PC relative addresses. */
-
+
.align 0
.LC0:
#ifdef ARM_RDI_MONITOR
@@ -241,9 +241,9 @@ StackLimit: .word 0
CommandLine: .space 256,0 /* Maximum length of 255 chars handled */
#endif
.globl SWI_Handler
-SWI_Handler:
- B SWI_Handler
-
+SWI_Handler:
+ B SWI_Handler
+
#ifdef __pe__
.section .idata$3
.long 0,0,0,0,0,0,0,0
diff --git a/c/src/lib/libbsp/arm/armulator/startup/bspstart.c b/c/src/lib/libbsp/arm/armulator/startup/bspstart.c
index 424a90c49a..8fc4230681 100644
--- a/c/src/lib/libbsp/arm/armulator/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/armulator/startup/bspstart.c
@@ -15,11 +15,11 @@
*/
#include <string.h>
-
+
#include <bsp.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
-
+
/*
* The original table from the application and our copy of it with
* some changes.
@@ -36,7 +36,7 @@ char *rtems_progname;
/*
* Use the shared implementations of the following routines
*/
-
+
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
@@ -53,7 +53,7 @@ void bsp_libc_init( void *, uint32_t, int );
* not yet initialized.
*
*/
-
+
void bsp_pretasking_hook(void)
{
extern int HeapBase;
@@ -68,7 +68,7 @@ void bsp_pretasking_hook(void)
#endif
}
-
+
/*
* bsp_start
*
diff --git a/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c b/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c
index 1eb8f7034b..09714436dd 100644
--- a/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c
+++ b/c/src/lib/libbsp/arm/armulator/startup/libcfunc.c
@@ -1,7 +1,7 @@
/* Support files for GNU libc. Files in the C namespace go here.
Files in the system namespace (ie those that start with an underscore)
go in syscalls.c.
-
+
Note: These functions are in a seperate file so that OS providers can
overrride the system call stubs (defined in syscalls.c) without having
to provide libc funcitons as well. */
diff --git a/c/src/lib/libbsp/arm/armulator/startup/syscalls.c b/c/src/lib/libbsp/arm/armulator/startup/syscalls.c
index 801e3d7aa1..9af21c352a 100644
--- a/c/src/lib/libbsp/arm/armulator/startup/syscalls.c
+++ b/c/src/lib/libbsp/arm/armulator/startup/syscalls.c
@@ -40,7 +40,7 @@ initialize_monitor_handles (void)
{
#ifdef ARM_RDI_MONITOR
int volatile block[3];
-
+
block[0] = (int) ":tt";
block[2] = 3; /* length of filename */
block[1] = 0; /* mode "r" */
@@ -80,11 +80,11 @@ _swiread (int file,
int fh = file;
#ifdef ARM_RDI_MONITOR
int block[3];
-
+
block[0] = fh;
block[1] = (int) ptr;
block[2] = len;
-
+
return do_AngelSWI (AngelSWI_Reason_Read, block);
#else
asm ("mov r0, %1; mov r1, %2;mov r2, %3; swi %a0"
@@ -104,11 +104,11 @@ _swiwrite (
int fh = file;
#ifdef ARM_RDI_MONITOR
int block[3];
-
+
block[0] = fh;
block[1] = (int) ptr;
block[2] = len;
-
+
return do_AngelSWI (AngelSWI_Reason_Write, block);
#else
asm ("mov r0, %1; mov r1, %2;mov r2, %3; swi %a0"
@@ -119,14 +119,14 @@ _swiwrite (
}
/*
- * Move me
+ * Move me
*/
void
bsp_cleanup (void )
{
/* FIXME: return code is thrown away */
-
+
#ifdef ARM_RDI_MONITOR
do_AngelSWI (AngelSWI_Reason_ReportException,
(void *) ADP_Stopped_ApplicationExit);
diff --git a/c/src/lib/libbsp/arm/armulator/startup/trap.S b/c/src/lib/libbsp/arm/armulator/startup/trap.S
index 328fabca5c..4021ea1d18 100644
--- a/c/src/lib/libbsp/arm/armulator/startup/trap.S
+++ b/c/src/lib/libbsp/arm/armulator/startup/trap.S
@@ -78,7 +78,7 @@ __rt_stkovf_split_big:
@ dummy space on the stack and passing in a "phantom" arg1 into
@ the function. This means that we do not need to worry about
@ preserving the stack under "sp" even on function return.
- @
+ @
@ Code should never poke values beneath sp. The sp register
@ should always be "dropped" first to cover the data. This
@ protects the data against any events that may try and use
diff --git a/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c b/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c
index 5e2898affe..5850436de3 100644
--- a/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c
+++ b/c/src/lib/libbsp/arm/edb7312/clock/clockdrv.c
@@ -44,7 +44,7 @@ rtems_irq_connect_data clock_isr_data = {BSP_TC1OI,
} while(0)
-/*
+/*
* Set up the clock hardware
*/
#define Clock_driver_support_initialize_hardware() \
diff --git a/c/src/lib/libbsp/arm/edb7312/console/uart.c b/c/src/lib/libbsp/arm/edb7312/console/uart.c
index 4bb897a0d4..c2628756e0 100644
--- a/c/src/lib/libbsp/arm/edb7312/console/uart.c
+++ b/c/src/lib/libbsp/arm/edb7312/console/uart.c
@@ -34,8 +34,8 @@ static int uart_set_attributes(int minor, const struct termios *t);
unsigned long Console_Port_Count = NUM_DEVS;
console_data Console_Port_Data[NUM_DEVS];
rtems_device_minor_number Console_Port_Minor = 0;
-console_fns uart_fns =
-{
+console_fns uart_fns =
+{
libchip_serial_default_probe,
uart_first_open,
uart_last_close,
@@ -69,7 +69,7 @@ console_tbl Console_Port_Tbl[] = {
static int uart_first_open(int major, int minor, void *arg) {return 0;}
static int uart_last_close(int major, int minor, void *arg) {return 0;}
-static int uart_read(int minor)
+static int uart_read(int minor)
{
return uart_poll_read(minor);
}
@@ -79,7 +79,7 @@ static void uart_write_polled(int minor, char c)
uart_write(minor, &c, 1);
}
-static int uart_set_attributes(int minor, const struct termios *t)
+static int uart_set_attributes(int minor, const struct termios *t)
{
return 0;
}
@@ -100,7 +100,7 @@ int uart_poll_read(int minor)
return -1;
}
-
+
err = *data_reg;
c = err & 0xff;
@@ -133,7 +133,7 @@ static int uart_write(int minor, const char *buf, int len)
c = (char) buf[i];
*data_reg = c;
}
-
+
return 1;
}
@@ -142,7 +142,7 @@ static void uart_init(int minor)
volatile uint32_t *data_reg;
volatile uint32_t *ctrl_reg1;
volatile uint32_t *ctrl_reg2;
-
+
data_reg = (uint32_t*)Console_Port_Tbl[minor].ulDataPort;
ctrl_reg1 = (uint32_t*)Console_Port_Tbl[minor].ulCtrlPort1;
ctrl_reg2 = (uint32_t*)Console_Port_Tbl[minor].ulCtrlPort2;
@@ -156,6 +156,6 @@ static void uart_init(int minor)
*ctrl_reg1 = (EP7312_UART_WRDLEN8 |
EP7312_UART_FIFOEN |
0x17); /* 9600 baud */
-
+
}
diff --git a/c/src/lib/libbsp/arm/edb7312/include/bsp.h b/c/src/lib/libbsp/arm/edb7312/include/bsp.h
index 181d4702bc..1c86164ced 100644
--- a/c/src/lib/libbsp/arm/edb7312/include/bsp.h
+++ b/c/src/lib/libbsp/arm/edb7312/include/bsp.h
@@ -24,7 +24,7 @@ extern "C" {
#include <rtems/iosupp.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
-
+
/*
* Define the interrupt mechanism for Time Test 27
*
@@ -42,16 +42,16 @@ extern rtems_configuration_table BSP_Configuration;
#define MUST_WAIT_FOR_INTERRUPT 0
-#define Install_tm27_vector( handler )
+#define Install_tm27_vector( handler )
-#define Cause_tm27_intr()
+#define Cause_tm27_intr()
-#define Clear_tm27_intr()
+#define Clear_tm27_intr()
#define Lower_tm27_intr()
-
+
/*
* Network driver configuration
*/
diff --git a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
index b2e0b9f806..13bcc3b7bf 100644
--- a/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
+++ b/c/src/lib/libbsp/arm/edb7312/include/ep7312.h
@@ -2,7 +2,7 @@
* Cirrus EP7312 register declarations
*
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
- *
+ *
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
*
* The license and distribution terms for this file may be
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
index 8540b68294..69a41828b7 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
+++ b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
@@ -2,7 +2,7 @@
* Cirrus EP7312 Intererrupt handler
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
*
* The license and distribution terms for this file may be
@@ -15,11 +15,11 @@
*/
#define __asm__
#include "irq.h"
-
+
#define VECTOR_TABLE 0x40
-
-/*
- * Function to obtain, execute an IT handler and acknowledge the IT
+
+/*
+ * Function to obtain, execute an IT handler and acknowledge the IT
*/
.globl ExecuteITHandler
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c
index f55b7baf1a..c8c3c7154f 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c
+++ b/c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_init.c
@@ -2,7 +2,7 @@
* Cirrus EP7312 Intererrupt handler
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
*
* The license and distribution terms for this file may be
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.c b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
index e48c2cb999..31f24fc82a 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/irq.c
+++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.c
@@ -2,7 +2,7 @@
* Cirrus EP7312 Intererrupt handler
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
*
* The license and distribution terms for this file may be
@@ -39,7 +39,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -50,7 +50,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
if (*(HdlTable + irq->name) != default_int_handler) {
return 0;
}
-
+
_CPU_ISR_Disable(level);
/*
@@ -81,7 +81,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
/* interrupt managed by INTMR3 and INTSR3 */
*EP7312_INTMR3 |= (1 << (irq->name - 21));
}
-
+
/*
* Enable interrupt on device
*/
@@ -89,9 +89,9 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
irq->on(irq);
}
-
+
_CPU_ISR_Enable(level);
-
+
return 1;
}
@@ -99,7 +99,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -135,18 +135,18 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
/* interrupt managed by INTMR3 and INTSR3 */
*EP7312_INTMR3 &= ~(1 << (irq->name - 21));
}
-
+
/*
* Disable interrupt on device
*/
if(irq->off)
irq->off(irq);
-
+
/*
* restore the default irq value
*/
*(HdlTable + irq->name) = default_int_handler;
-
+
_CPU_ISR_Enable(level);
return 1;
diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.h b/c/src/lib/libbsp/arm/edb7312/irq/irq.h
index 58189b462e..b87586f459 100644
--- a/c/src/lib/libbsp/arm/edb7312/irq/irq.h
+++ b/c/src/lib/libbsp/arm/edb7312/irq/irq.h
@@ -2,7 +2,7 @@
* Cirrus EP7312 Intererrupt handler
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
*
* The license and distribution terms for this file may be
@@ -29,7 +29,7 @@ extern "C" {
/*
* Include some preprocessor value also used by assember code
*/
-
+
#include <rtems.h>
extern void default_int_handler();
@@ -68,7 +68,7 @@ typedef enum {
} rtems_irq_symbolic_name;
-
+
/*
* Type definition for RTEMS managed interrupts
*/
@@ -98,9 +98,9 @@ typedef struct __rtems_irq_connect_data__ {
* It is usually called immediately AFTER connecting the interrupt handler.
* RTEMS may well need such a function when restoring normal interrupt
* processing after a debug session.
- *
+ *
*/
- rtems_irq_enable on;
+ rtems_irq_enable on;
/*
* function for disabling interrupts at device level (ONLY!).
* The code will disable it at i8259s level. RATIONALE : anyway
@@ -170,7 +170,7 @@ void BSP_rtems_irq_mngt_init();
* 4) perform rescheduling when necessary,
* 5) restore the C scratch registers...
* 6) restore initial execution flow
- *
+ *
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*);
diff --git a/c/src/lib/libbsp/arm/edb7312/network/network.c b/c/src/lib/libbsp/arm/edb7312/network/network.c
index e8a02019fb..a622722020 100644
--- a/c/src/lib/libbsp/arm/edb7312/network/network.c
+++ b/c/src/lib/libbsp/arm/edb7312/network/network.c
@@ -28,8 +28,8 @@ void cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data)
{
/* works the same for all values of dev */
/*
- printf("cs8900_io_set_reg: reg: %#6x, val %#6x\n",
- CS8900_BASE + reg,
+ printf("cs8900_io_set_reg: reg: %#6x, val %#6x\n",
+ CS8900_BASE + reg,
data);
*/
*(unsigned short *)(CS8900_BASE + reg) = data;
@@ -47,7 +47,7 @@ unsigned short cs8900_io_get_reg (int dev, unsigned short reg)
return val;
}
-/* cs8900_mem_set_reg - sets one of the registers mapped through
+/* cs8900_mem_set_reg - sets one of the registers mapped through
* PacketPage
*/
void cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data)
@@ -57,7 +57,7 @@ void cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data)
cs8900_io_set_reg(dev, CS8900_IO_PP_DATA_PORT0, data);
}
-/* cs8900_mem_get_reg - reads one of the registers mapped through
+/* cs8900_mem_get_reg - reads one of the registers mapped through
* PacketPage
*/
unsigned short cs8900_mem_get_reg (int dev, unsigned long reg)
@@ -96,7 +96,7 @@ unsigned short cs8900_get_data_block (int dev, unsigned char *data)
len = cs8900_mem_get_reg(dev, CS8900_PP_RxLength);
for (i = 0; i < ((len + 1) / 2); i++) {
- ((short *)data)[i] = cs8900_io_get_reg(dev,
+ ((short *)data)[i] = cs8900_io_get_reg(dev,
CS8900_IO_RX_TX_DATA_PORT0);
}
return len;
@@ -115,10 +115,10 @@ void cs8900_tx_load (int dev, struct mbuf *m)
len += m->m_len;
m = m->m_next;
} while (m != 0);
-
+
data = (unsigned short *) &g_enetbuf[0];
for (i = 0; i < ((len + 1) / 2); i++) {
- cs8900_io_set_reg(dev,
+ cs8900_io_set_reg(dev,
CS8900_IO_RX_TX_DATA_PORT0,
data[i]);
}
diff --git a/c/src/lib/libbsp/arm/edb7312/start/start.S b/c/src/lib/libbsp/arm/edb7312/start/start.S
index b7db4d4d42..95b3bc88fa 100644
--- a/c/src/lib/libbsp/arm/edb7312/start/start.S
+++ b/c/src/lib/libbsp/arm/edb7312/start/start.S
@@ -2,7 +2,7 @@
* Cirrus EP7312 Startup code
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* Copyright (c) 2002 by Charlie Steader <charlies@poliac.com>
*
* The license and distribution terms for this file may be
@@ -14,7 +14,7 @@
* $Id$
*/
-
+
/* Some standard definitions...*/
.equ Mode_USR, 0x10
@@ -33,7 +33,7 @@
.text
.globl _start
-
+
_start:
/* store the sp */
mov r12, sp
@@ -41,19 +41,19 @@ _start:
* Here is the code to initialize the low-level BSP environment
* (Chip Select, PLL, ....?)
*/
-
+
/* zero the bss */
LDR r1, =_bss_end_ /* get end of ZI region */
LDR r0, =_bss_start_ /* load base address of ZI region */
-zi_init:
+zi_init:
MOV r2, #0
CMP r0, r1 /* loop whilst r0 < r1 */
STRLOT r2, [r0], #4
- BLO zi_init
-
+ BLO zi_init
+
/* Load basic ARM7 interrupt table */
-VectorInit:
+VectorInit:
MOV R0, #0
ADR R1, Vector_Init_Block
LDMIA R1!, {R2, r3} /* Copy the Vectors (8 words) */
@@ -78,10 +78,10 @@ VectorInit:
/*******************************************************
standard exception vectors table
- *** Must be located at address 0
-********************************************************/
+ *** Must be located at address 0
+********************************************************/
-Vector_Init_Block:
+Vector_Init_Block:
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
@@ -92,45 +92,45 @@ Vector_Init_Block:
LDR PC, FIQ_Addr
.globl Reset_Addr
-Reset_Addr: .long _start
+Reset_Addr: .long _start
Undefined_Addr: .long Undefined_Handler
SWI_Addr: .long SWI_Handler
Prefetch_Addr: .long Prefetch_Handler
Abort_Addr: .long Abort_Handler
- .long 0
+ .long 0
IRQ_Addr: .long IRQ_Handler
FIQ_Addr: .long FIQ_Handler
-
+
/* The following handlers do not do anything useful */
.globl Undefined_Handler
-Undefined_Handler:
+Undefined_Handler:
B Undefined_Handler
.globl SWI_Handler
-SWI_Handler:
- B SWI_Handler
+SWI_Handler:
+ B SWI_Handler
.globl Prefetch_Handler
-Prefetch_Handler:
+Prefetch_Handler:
B Prefetch_Handler
.globl Abort_Handler
-Abort_Handler:
+Abort_Handler:
B Abort_Handler
.globl IRQ_Handler
-IRQ_Handler:
+IRQ_Handler:
B IRQ_Handler
.globl FIQ_Handler
-FIQ_Handler:
+FIQ_Handler:
B FIQ_Handler
-init2 :
+init2 :
/* --- Initialise stack pointer registers */
-
+
/* Enter IRQ mode and set up the IRQ stack pointer */
MOV r0, #Mode_IRQ | I_Bit | F_Bit /* No interrupts */
MSR cpsr, r0
ldr r1, =_irq_stack_size
LDR sp, =_irq_stack
add sp, sp, r1
- sub sp, sp, #0x64
+ sub sp, sp, #0x64
/* Enter FIQ mode and set up the FIQ stack pointer */
MOV r0, #Mode_FIQ | I_Bit | F_Bit /* No interrupts */
@@ -138,7 +138,7 @@ init2 :
ldr r1, =_fiq_stack_size
LDR sp, =_fiq_stack
add sp, sp, r1
- sub sp, sp, #0x64
+ sub sp, sp, #0x64
/* Enter ABT mode and set up the ABT stack pointer */
MOV r0, #Mode_ABT | I_Bit | F_Bit /* No interrupts */
@@ -146,15 +146,15 @@ init2 :
ldr r1, =_abt_stack_size
LDR sp, =_abt_stack
add sp, sp, r1
- sub sp, sp, #0x64
-
+ sub sp, sp, #0x64
+
/* Set up the SVC stack pointer last and stay in SVC mode */
MOV r0, #Mode_SVC | I_Bit | F_Bit /* No interrupts */
MSR cpsr, r0
ldr r1, =_svc_stack_size
LDR sp, =_svc_stack
add sp, sp, r1
- sub sp, sp, #0x64
+ sub sp, sp, #0x64
/* save the original registers */
stmdb sp!, {r4-r12, lr}
diff --git a/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c b/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c
index 62ba300662..714a134d26 100644
--- a/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/edb7312/startup/bspstart.c
@@ -2,7 +2,7 @@
* Cirrus EP7312 Startup code
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -79,12 +79,12 @@ void bsp_pretasking_hook(void)
uint32_t heap_size;
- /*
+ /*
* Set up the heap. It uses all free SDRAM except that reserved
* for non-cached uses.
*/
heap_start = free_mem_start;
-
+
/* heap_size = (free_mem_end - heap_start - MEM_NOCACHE_SIZE); */
heap_size = 0x200000;
@@ -97,7 +97,7 @@ void bsp_pretasking_hook(void)
#endif /* RTEMS_DEBUG */
} /* bsp_pretasking_hook */
-
+
/**************************************************************************/
/* */
@@ -133,26 +133,26 @@ void bsp_start_default( void )
Cpu_table.pretasking_hook = bsp_pretasking_hook;
Cpu_table.postdriver_hook = bsp_postdriver_hook;
Cpu_table.do_zero_of_workspace = TRUE;
-
+
/* Place RTEMS workspace at beginning of free memory. */
BSP_Configuration.work_space_start = (void *)&_bss_free_start;
-
- free_mem_start = ((uint32_t)&_bss_free_start +
+
+ free_mem_start = ((uint32_t)&_bss_free_start +
BSP_Configuration.work_space_size);
-
+
free_mem_end = ((uint32_t)&_sdram_base + (uint32_t)&_sdram_size);
-
+
/*
* Init rtems exceptions management
*/
rtems_exception_init_mngt();
-
+
/*
* Init rtems interrupt management
*/
- rtems_irq_mngt_init();
-
-
+ rtems_irq_mngt_init();
+
+
/*
* The following information is very useful when debugging.
*/
@@ -168,7 +168,7 @@ void bsp_start_default( void )
BSP_Configuration.number_of_device_drivers );
printk( "Device_driver_table = 0x%x\n",
BSP_Configuration.Device_driver_table );
-
+
/* printk( "_stack_size = 0x%x\n", _stack_size );*/
printk( "work_space_start = 0x%x\n", BSP_Configuration.work_space_start );
printk( "work_space_size = 0x%x\n", BSP_Configuration.work_space_size );
diff --git a/c/src/lib/libbsp/arm/edb7312/startup/exit.c b/c/src/lib/libbsp/arm/edb7312/startup/exit.c
index 23e12fa54b..abdbed15a8 100644
--- a/c/src/lib/libbsp/arm/edb7312/startup/exit.c
+++ b/c/src/lib/libbsp/arm/edb7312/startup/exit.c
@@ -2,7 +2,7 @@
* Cirrus EP7312 BSP Shutdown code
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
diff --git a/c/src/lib/libbsp/arm/edb7312/timer/timer.c b/c/src/lib/libbsp/arm/edb7312/timer/timer.c
index efc59beeed..9acacb89d6 100644
--- a/c/src/lib/libbsp/arm/edb7312/timer/timer.c
+++ b/c/src/lib/libbsp/arm/edb7312/timer/timer.c
@@ -2,7 +2,7 @@
* Cirrus EP7312 Timer driver
*
* Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
- *
+ *
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
*
@@ -14,7 +14,7 @@
* Timer_initialize() and Read_timer(). Read_timer() usually returns
* the number of microseconds since Timer_initialize() exitted.
*
- * It is important that the timer start/stop overhead be determined
+ * It is important that the timer start/stop overhead be determined
* when porting or modifying this code.
*
* $Id$
diff --git a/c/src/lib/libbsp/arm/shared/comm/console.c b/c/src/lib/libbsp/arm/shared/comm/console.c
index a6c4c58cca..fc6cec3f31 100644
--- a/c/src/lib/libbsp/arm/shared/comm/console.c
+++ b/c/src/lib/libbsp/arm/shared/comm/console.c
@@ -1,11 +1,11 @@
/*-------------------------------------------------------------------------+
-| console.c - ARM BSP
+| console.c - ARM BSP
+--------------------------------------------------------------------------+
| This file contains the ARM console I/O package.
+--------------------------------------------------------------------------+
| COPYRIGHT (c) 2000 Canon Research France SA.
| Emmanuel Raguet, mailto:raguet@crf.canon.fr
-|
+|
| The license and distribution terms for this file may be
| found in found in the file LICENSE in this distribution or at
| http://www.rtems.com/license/LICENSE.
@@ -65,9 +65,9 @@ static int isr_is_on(const rtems_irq_connect_data *);
*/
/* for printk support */
-BSP_output_char_function_type BSP_output_char =
+BSP_output_char_function_type BSP_output_char =
(BSP_output_char_function_type) BSP_output_char_via_serial;
-BSP_polling_getchar_function_type BSP_poll_char =
+BSP_polling_getchar_function_type BSP_poll_char =
(BSP_polling_getchar_function_type) BSP_poll_char_via_serial;
@@ -82,7 +82,7 @@ isr_on(const rtems_irq_connect_data *unused)
{
return;
}
-
+
static void
isr_off(const rtems_irq_connect_data *unused)
{
@@ -102,9 +102,9 @@ void __assert (const char *file, int line, const char *msg)
{
static char exit_msg[] = "EXECUTIVE SHUTDOWN! Any key to reboot...";
unsigned char ch;
-
+
/*
- * Note we cannot call exit or printf from here,
+ * Note we cannot call exit or printf from here,
* assert can fail inside ISR too
*/
@@ -121,7 +121,7 @@ void __assert (const char *file, int line, const char *msg)
printk(exit_msg);
ch = BSP_poll_char();
printk("\n\n");
- rtemsReboot();
+ rtemsReboot();
}
@@ -142,21 +142,21 @@ console_initialize(rtems_device_major_number major,
* Set up TERMIOS
*/
rtems_termios_initialize ();
-
+
/*
* Do device-specific initialization
*/
-
+
/* 38400-8-N-1 */
BSP_uart_init(BSPConsolePort, 38400, 0);
-
-
+
+
/* Set interrupt handler */
console_isr_data.name = BSP_UART;
console_isr_data.hdl = BSP_uart_termios_isr_com1;
console_isr_data.irqLevel = 3;
console_isr_data.irqTrigger = 0;
-
+
status = BSP_install_rtems_irq_handler(&console_isr_data);
if (!status){
@@ -196,7 +196,7 @@ console_open(rtems_device_major_number major,
void *arg)
{
rtems_status_code status;
- static rtems_termios_callbacks cb =
+ static rtems_termios_callbacks cb =
{
NULL, /* firstOpen */
console_last_close, /* lastClose */
@@ -219,9 +219,9 @@ console_open(rtems_device_major_number major,
/*
* Pass data area info down to driver
*/
- BSP_uart_termios_set(BSPConsolePort,
+ BSP_uart_termios_set(BSPConsolePort,
((rtems_libio_open_close_args_t *)arg)->iop->data1);
-
+
/* Enable interrupts on channel */
BSP_uart_intr_ctrl(BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS);
@@ -243,7 +243,7 @@ console_close(rtems_device_major_number major,
return res;
} /* console_close */
-
+
/*-------------------------------------------------------------------------+
| Console device driver READ entry point.
+--------------------------------------------------------------------------+
@@ -256,9 +256,9 @@ console_read(rtems_device_major_number major,
{
return rtems_termios_read (arg);
-
+
} /* console_read */
-
+
/*-------------------------------------------------------------------------+
| Console device driver WRITE entry point.
@@ -272,20 +272,20 @@ console_write(rtems_device_major_number major,
{
return rtems_termios_write (arg);
-
+
} /* console_write */
-
+
/*
* Handle ioctl request.
*/
-rtems_device_driver
+rtems_device_driver
console_control(rtems_device_major_number major,
rtems_device_minor_number minor,
void * arg
)
-{
+{
return rtems_termios_ioctl (arg);
}
@@ -294,45 +294,45 @@ conSetAttr(int minor, const struct termios *t)
{
int baud;
- switch (t->c_cflag & CBAUD)
+ switch (t->c_cflag & CBAUD)
{
- case B50:
+ case B50:
baud = 50;
break;
- case B75:
- baud = 75;
+ case B75:
+ baud = 75;
break;
- case B110:
- baud = 110;
+ case B110:
+ baud = 110;
break;
- case B134:
- baud = 134;
+ case B134:
+ baud = 134;
break;
- case B150:
- baud = 150;
+ case B150:
+ baud = 150;
break;
case B200:
- baud = 200;
+ baud = 200;
break;
- case B300:
+ case B300:
baud = 300;
break;
- case B600:
- baud = 600;
+ case B600:
+ baud = 600;
break;
- case B1200:
+ case B1200:
baud = 1200;
break;
- case B1800:
- baud = 1800;
+ case B1800:
+ baud = 1800;
break;
- case B2400:
+ case B2400:
baud = 2400;
break;
- case B4800:
+ case B4800:
baud = 4800;
break;
- case B9600:
+ case B9600:
baud = 9600;
break;
case B19200:
@@ -341,7 +341,7 @@ conSetAttr(int minor, const struct termios *t)
case B38400:
baud = 38400;
break;
- case B57600:
+ case B57600:
baud = 57600;
break;
case B115200:
diff --git a/c/src/lib/libbsp/arm/shared/comm/uart.c b/c/src/lib/libbsp/arm/shared/comm/uart.c
index 5b57e923a1..21ba31dcdf 100644
--- a/c/src/lib/libbsp/arm/shared/comm/uart.c
+++ b/c/src/lib/libbsp/arm/shared/comm/uart.c
@@ -33,10 +33,10 @@ struct uart_data
static struct uart_data uart_data[2];
-/*
+/*
* Macros to read/wirte register of uart, if configuration is
* different just rewrite these macros
- */
+ */
static inline unsigned char
uread(int uart, unsigned int reg)
@@ -44,11 +44,11 @@ uread(int uart, unsigned int reg)
register unsigned char val;
val = Regs[reg];
-
+
return val;
}
-static inline void
+static inline void
uwrite(int uart, int reg, unsigned int val)
{
@@ -81,13 +81,13 @@ uartError(int uart)
inline void uartError(int uart)
{
unsigned char uartStatus;
-
+
uartStatus = uread(uart, LSR);
uartStatus = uread(uart, RBR);
}
#endif
-/*
+/*
* Uart initialization, it is hardcoded to 8 bit, no parity,
* one stop bit, FIFO, things to be changed
* are baud rate and nad hw flow control,
@@ -97,10 +97,10 @@ void
BSP_uart_init(int uart, int baud, int hwFlow)
{
unsigned char tmp;
-
+
/* Sanity check */
assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);
-
+
switch(baud)
{
case 50:
@@ -121,20 +121,20 @@ BSP_uart_init(int uart, int baud, int hwFlow)
assert(0);
return;
}
-
+
/* Enable UART block */
uwrite(uart, CNT, UART_ENABLE | PAD_ENABLE);
/* Set DLAB bit to 1 */
uwrite(uart, LCR, DLAB);
-
+
/* Set baud rate */
- uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff);
- uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff);
+ uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff);
+ uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff);
/* 8-bit, no parity , 1 stop */
uwrite(uart, LCR, CHR_8_BITS);
-
+
/* Enable FIFO */
uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12);
@@ -151,7 +151,7 @@ BSP_uart_init(int uart, int baud, int hwFlow)
return;
}
-/*
+/*
* Set baud
*/
void
@@ -161,10 +161,10 @@ BSP_uart_set_baud(int uart, int baud)
/* Sanity check */
assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);
-
- /*
+
+ /*
* This function may be called whenever TERMIOS parameters
- * are changed, so we have to make sure that baud change is
+ * are changed, so we have to make sure that baud change is
* indeed required
*/
@@ -178,14 +178,14 @@ BSP_uart_set_baud(int uart, int baud)
BSP_uart_init(uart, baud, uart_data[uart].hwFlow);
uwrite(uart, IER, ier);
-
+
return;
}
/*
- * Enable/disable interrupts
+ * Enable/disable interrupts
*/
-void
+void
BSP_uart_intr_ctrl(int uart, int cmd)
{
@@ -218,7 +218,7 @@ BSP_uart_intr_ctrl(int uart, int cmd)
assert(0);
break;
}
-
+
return;
}
@@ -227,12 +227,12 @@ BSP_uart_intr_ctrl(int uart, int cmd)
* Status function, -1 if error
* detected, 0 if no received chars available,
* 1 if received char available, 2 if break
- * is detected, it will eat break and error
- * chars. It ignores overruns - we cannot do
+ * is detected, it will eat break and error
+ * chars. It ignores overruns - we cannot do
* anything about - it execpt count statistics
* and we are not counting it.
*/
-int
+int
BSP_uart_polled_status(int uart)
{
unsigned char val;
@@ -250,7 +250,7 @@ BSP_uart_polled_status(int uart)
if((val & (DR | OE | FE)) == 1)
{
- /* No error, character present */
+ /* No error, character present */
return BSP_UART_STATUS_CHAR;
}
@@ -260,12 +260,12 @@ BSP_uart_polled_status(int uart)
return BSP_UART_STATUS_NOCHAR;
}
- /*
+ /*
* Framing or parity error
* eat character
*/
uread(uart, RBR);
-
+
return BSP_UART_STATUS_ERROR;
}
@@ -273,24 +273,24 @@ BSP_uart_polled_status(int uart)
/*
* Polled mode write function
*/
-void
+void
BSP_uart_polled_write(int uart, int val)
{
unsigned char val1;
-
+
/* Sanity check */
assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);
-
+
for(;;)
{
- if((val1=uread(uart, LSR)) & THRE)
+ if((val1=uread(uart, LSR)) & THRE)
{
break;
}
}
uwrite(uart, THR, val & 0xff);
-
+
return;
}
@@ -301,16 +301,16 @@ BSP_output_char_via_serial(int val)
if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r');
}
-/*
+/*
* Polled mode read function
*/
-int
+int
BSP_uart_polled_read(int uart)
{
unsigned char val;
assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);
-
+
for(;;)
{
if(uread(uart, LSR) & DR)
@@ -318,13 +318,13 @@ BSP_uart_polled_read(int uart)
break;
}
}
-
+
val = uread(uart, RBR);
return (int)(val & 0xff);
}
-unsigned
+unsigned
BSP_poll_char_via_serial()
{
return BSP_uart_polled_read(BSPConsolePort);
@@ -346,19 +346,19 @@ static char termios_tx_hold_com2 = 0;
static volatile char termios_tx_hold_valid_com2 = 0;
/*
- * Set channel parameters
+ * Set channel parameters
*/
void
BSP_uart_termios_set(int uart, void *ttyp)
{
assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);
-
+
if(uart == BSP_UART_COM1)
{
termios_stopped_com1 = 0;
termios_tx_active_com1 = 0;
termios_ttyp_com1 = ttyp;
- termios_tx_hold_com1 = 0;
+ termios_tx_hold_com1 = 0;
termios_tx_hold_valid_com1 = 0;
}
else
@@ -366,7 +366,7 @@ BSP_uart_termios_set(int uart, void *ttyp)
termios_stopped_com2 = 0;
termios_tx_active_com2 = 0;
termios_ttyp_com2 = ttyp;
- termios_tx_hold_com2 = 0;
+ termios_tx_hold_com2 = 0;
termios_tx_hold_valid_com2 = 0;
}
@@ -384,7 +384,7 @@ BSP_uart_termios_write_com1(int minor, const char *buf, int len)
}
/* If there TX buffer is busy - something is royally screwed up */
- assert((uread(BSP_UART_COM1, LSR) & THRE) != 0);
+ assert((uread(BSP_UART_COM1, LSR) & THRE) != 0);
if(termios_stopped_com1)
{
@@ -401,7 +401,7 @@ BSP_uart_termios_write_com1(int minor, const char *buf, int len)
if(!termios_tx_active_com1)
{
termios_tx_active_com1 = 1;
- uwrite(BSP_UART_COM1, IER,
+ uwrite(BSP_UART_COM1, IER,
(RECEIVE_ENABLE |
TRANSMIT_ENABLE |
RECEIVER_LINE_ST_ENABLE
@@ -465,7 +465,7 @@ BSP_uart_termios_isr_com1(void)
for(;;)
{
vect = uread(BSP_UART_COM1, IIR) & 0xf;
-
+
switch(vect)
{
case NO_MORE_INTR :
@@ -479,9 +479,9 @@ BSP_uart_termios_isr_com1(void)
}
return;
case TRANSMITTER_HODING_REGISTER_EMPTY :
- /*
- * TX holding empty: we have to disable these interrupts
- * if there is nothing more to send.
+ /*
+ * TX holding empty: we have to disable these interrupts
+ * if there is nothing more to send.
*/
ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1);
@@ -514,7 +514,7 @@ BSP_uart_termios_isr_com1(void)
}
}
}
-
+
void
BSP_uart_termios_isr_com2()
{
@@ -526,7 +526,7 @@ BSP_uart_termios_isr_com2()
for(;;)
{
vect = uread(BSP_UART_COM2, IIR) & 0xf;
-
+
switch(vect)
{
case NO_MORE_INTR :
@@ -540,8 +540,8 @@ BSP_uart_termios_isr_com2()
}
return;
case TRANSMITTER_HODING_REGISTER_EMPTY :
- /*
- * TX holding empty: we have to disable these interrupts
+ /*
+ * TX holding empty: we have to disable these interrupts
* if there is nothing more to send.
*/
diff --git a/c/src/lib/libbsp/arm/shared/comm/uart.h b/c/src/lib/libbsp/arm/shared/comm/uart.h
index c472d8296e..18322cedee 100644
--- a/c/src/lib/libbsp/arm/shared/comm/uart.h
+++ b/c/src/lib/libbsp/arm/shared/comm/uart.h
@@ -38,7 +38,7 @@ extern int BSPConsolePort;
extern int BSPBaseBaud;
/*
* Command values for BSP_uart_intr_ctrl(),
- * values are strange in order to catch errors
+ * values are strange in order to catch errors
* with assert
*/
#define BSP_UART_INTR_CTRL_DISABLE (0)
@@ -71,20 +71,20 @@ extern int BSPBaseBaud;
#define RBR RSRBR /* Rx Buffer Register (read) */
#define THR RSTHR /* Tx Buffer Register (write) */
#define IER RSIER /* Interrupt Enable Register */
-
+
/* DLAB X */
#define IIR RSIIR /* Interrupt Ident Register (read) */
#define FCR RSFCR /* FIFO Control Register (write) */
#define LCR RSLCR /* Line Control Register */
#define LSR RSLSR /* Line Status Register */
-
+
/* DLAB 1 */
#define DLL RSDLL /* Divisor Latch, LSB */
#define DLM RSDLH /* Divisor Latch, MSB */
-
+
/* Uart control */
#define CNT RSCNT /* General Control register */
-
+
/*
* define bit for CNT
*/
diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S
index 348533e385..52a1692819 100644
--- a/c/src/lib/libbsp/arm/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/arm/shared/irq/irq_asm.S
@@ -25,16 +25,16 @@
_ISR_Handler:
stmdb sp!, {r0, r1, r2, r3, r12} /* save regs on INT stack */
stmdb sp!, {lr} /* now safe to call C funcs */
-
+
/* one nest level deeper */
- ldr r0, =_ISR_Nest_level
+ ldr r0, =_ISR_Nest_level
ldr r1, [r0]
add r1, r1,#1
str r1, [r0]
-
+
/* disable multitasking */
- ldr r0, =_Thread_Dispatch_disable_level
+ ldr r0, =_Thread_Dispatch_disable_level
ldr r1, [r0]
add r1, r1,#1
str r1, [r0]
@@ -42,14 +42,14 @@ _ISR_Handler:
/* BSP specific function to INT handler */
/* FIXME: I'm not sure why I can't save just r12. I'm also */
/* not sure which of r1-r3 are important. */
- bl ExecuteITHandler
+ bl ExecuteITHandler
-/* one less nest level */
+/* one less nest level */
ldr r0, =_ISR_Nest_level
ldr r1, [r0]
sub r1, r1,#1
str r1, [r0]
-
+
/* unnest multitasking */
ldr r0, =_Thread_Dispatch_disable_level
ldr r1, [r0]
@@ -59,7 +59,7 @@ _ISR_Handler:
/* check to see if we interrupted nd INT (with FIQ?) */
mrs r0, spsr
and r0, r0, #0x1f
- cmp r0, #0x12 /* is it INT mode? */
+ cmp r0, #0x12 /* is it INT mode? */
beq exitit
/* If thread dispatching is disabled, exit */
@@ -70,18 +70,18 @@ _ISR_Handler:
ldr r0, =_Context_Switch_necessary
ldr r1, [r0]
cmp r1, #0
-
+
/* since bframe is going to clear _ISR_Signals_to_thread_executing, */
/* we need to load it here */
- ldr r0, =_ISR_Signals_to_thread_executing
+ ldr r0, =_ISR_Signals_to_thread_executing
ldr r1, [r0]
bne bframe
-
+
/* If a signals to be sent (_ISR_Signals_to_thread_executing != 0), */
/* call scheduler */
cmp r1, #0
beq exitit
-
+
/* _ISR_Signals_to_thread_executing = FALSE */
mov r1, #0
str r1, [r0]
@@ -94,7 +94,7 @@ bframe:
mrs r0, spsr
ldmia sp!, {r1} /* get lr off stack */
stmdb sp!, {r1}
- mrs r2, cpsr
+ mrs r2, cpsr
orr r3, r2, #0x1 /* change to SVC mode */
msr cpsr_c, r3
@@ -111,10 +111,10 @@ bframe:
ldmia sp!, {r1} /* out with the old */
stmdb sp!, {lr} /* in with the new (lr) */
-
+
orr r0, r0, #0xc0
msr spsr, r0
-
+
exitit:
ldmia sp!, {lr} /* restore regs from INT stack */
ldmia sp!, {r0, r1, r2, r3, r12} /* restore regs from INT stack */
@@ -122,7 +122,7 @@ exitit:
- /* on entry to _ISR_Dispatch, we're in SVC mode */
+ /* on entry to _ISR_Dispatch, we're in SVC mode */
.globl _ISR_Dispatch
_ISR_Dispatch:
stmdb sp!, {r0-r3, r12,lr} /* save regs on SVC stack */
@@ -130,15 +130,15 @@ _ISR_Dispatch:
/* we don't save lr, since */
/* it's just going to get */
/* overwritten */
-_ISR_Dispatch_p_4:
+_ISR_Dispatch_p_4:
bl _Thread_Dispatch
ldmia sp!, {r0-r3, r12, lr}
stmdb sp!, {r0-r2}
/* Now we have to screw with the stack */
mov r0, sp /* copy the SVC stack pointer */
-
- mrs r1, cpsr
+
+ mrs r1, cpsr
bic r2, r1, #0x1 /* change to INT mode */
orr r2, r2, #0xc0 /* disable interrupts */
msr cpsr_c, r2
@@ -147,7 +147,7 @@ _ISR_Dispatch_p_4:
stmdb sp!, {r4, r5, r6} /* save temp vars on INT stack */
ldmia r0!, {r4, r5, r6} /* Get r0-r3 from SVC stack */
stmdb sp!, {r4, r5, r6} /* and save them on INT stack */
-
+
ldmia r0!, {r4, r5} /* get saved values from SVC stack */
/* r4=spsr, r5=lr */
mov lr, r5 /* restore lr_int */
diff --git a/c/src/lib/libbsp/arm/shared/irq/irq_init.c b/c/src/lib/libbsp/arm/shared/irq/irq_init.c
index b92bcac7e5..7e60fbd032 100644
--- a/c/src/lib/libbsp/arm/shared/irq/irq_init.c
+++ b/c/src/lib/libbsp/arm/shared/irq/irq_init.c
@@ -32,14 +32,14 @@ void rtems_irq_mngt_init()
int i;
long *vectorTable;
rtems_interrupt_level level;
-
+
vectorTable = (long *) VECTOR_TABLE;
-
+
_CPU_ISR_Disable(level);
/* First, connect the ISR_Handler for IRQ and FIQ interrupts */
- _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
- _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL);
+ _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
+ _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL);
/* Initialize the vector table contents with default handler */
for (i=0; i<BSP_MAX_INT; i++)
diff --git a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
index 119c7c133c..761b5f3604 100644
--- a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
+++ b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
-| bsp.h - ARM BSP
+| bsp.h - ARM BSP
+--------------------------------------------------------------------------+
| This include file contains definitions related to the ARM BSP.
+--------------------------------------------------------------------------+
@@ -10,7 +10,7 @@
| The license and distribution terms for this file may be
| found in found in the file LICENSE in this distribution or at
| http://www.rtems.com/license/LICENSE.
-|
+|
| $Id$
+--------------------------------------------------------------------------*/
@@ -28,7 +28,7 @@ extern "C" {
#include <rtems/iosupp.h>
#include <rtems/console.h>
#include <rtems/clockdrv.h>
-
+
/*
* Define the interrupt mechanism for Time Test 27
*
@@ -38,11 +38,11 @@ extern "C" {
#define MUST_WAIT_FOR_INTERRUPT 0
-#define Install_tm27_vector( handler )
+#define Install_tm27_vector( handler )
-#define Cause_tm27_intr()
+#define Cause_tm27_intr()
-#define Clear_tm27_intr()
+#define Clear_tm27_intr()
#define Lower_tm27_intr()
diff --git a/c/src/lib/libbsp/arm/vegaplus/include/registers.h b/c/src/lib/libbsp/arm/vegaplus/include/registers.h
index 2c11582194..2a153fd8d9 100644
--- a/c/src/lib/libbsp/arm/vegaplus/include/registers.h
+++ b/c/src/lib/libbsp/arm/vegaplus/include/registers.h
@@ -12,15 +12,15 @@
#ifndef __LMREGS_H__
-#define __LMREGS_H__
+#define __LMREGS_H__
/*
- * VARIABLE DECLARATION
+ * VARIABLE DECLARATION
******************************************************************************
*/
/* register area size */
-#define LM_REG_AREA_SIZ (0x4000/4)
+#define LM_REG_AREA_SIZ (0x4000/4)
/*** Register mapping : defined by indexes in an array ***/
/*** NOTE : only 1 register every 4 byte address location (+ some holes) */
@@ -216,7 +216,7 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define RINGCNTL ((MISC_BASE+0x90)/4)
#define RINGFREQ ((MISC_BASE+0x94)/4)
#define RSCNTL ((MISC_BASE+0xA0)/4)
-/*#ifndef PRODUCT_VERSION*/
+/*#ifndef PRODUCT_VERSION*/
#define RSRXD ((MISC_BASE+0xA4)/4)
#define RSTXD ((MISC_BASE+0xA8)/4)
/*#endif*/
@@ -235,7 +235,7 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define CLKCNTL ((MISC_BASE+0xF4)/4)
#define OSCCOR ((MISC_BASE+0xF8)/4)
-/* PRODUCT_VERSION */
+/* PRODUCT_VERSION */
/* Added 30/08/99 : New Control register for UART control */
#define UART_BASE 0x3000
#define RSRBR ((UART_BASE+0x00)/4)
@@ -248,7 +248,7 @@ extern volatile unsigned long *Regs; /* Chip registers */
#define RSDLL ((UART_BASE+0x00)/4)
#define RSDLH ((UART_BASE+0x04)/4)
#define RSCNT ((UART_BASE+0x20)/4)
-/*PRODUCT_VERSION*/
+/*PRODUCT_VERSION*/
/** THUMB and INTERFACES BLOCK 0x3400 - 0x4FFF */
@@ -830,12 +830,12 @@ extern volatile unsigned long *Regs; /* Chip registers */
/* DCC register */
-/* bit ENABLE=0x80 already defined */
+/* bit ENABLE=0x80 already defined */
#define DCC_ENABLE 0x80
/* TIMERCNTL[0:1] register */
-/* bit ENABLE=0x80 already defined */
+/* bit ENABLE=0x80 already defined */
#define TIMER_ENABLE 0x80
#define RELOAD 0x0040
#define MSK_FREQ 0x0003 /* mask on FREQ field */
@@ -882,7 +882,7 @@ extern volatile unsigned long *Regs; /* Chip registers */
/******************************************************************************
- * Memory Mapping definition
+ * Memory Mapping definition
******************************************************************************
*/
@@ -901,7 +901,7 @@ extern volatile unsigned long *Regs; /* Chip registers */
/******************************************************************************
- * Slot Control bloc
+ * Slot Control bloc
******************************************************************************
*/
@@ -915,7 +915,7 @@ typedef volatile struct /* normal Slot Control Block */
unsigned char CNTL0;
unsigned char CNTL1;
unsigned char CNTL2;
- unsigned char STAT0;
+ unsigned char STAT0;
unsigned char STAT1;
unsigned char STAT2;
unsigned char CRYPT;
@@ -1051,7 +1051,7 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */
#define ZFIELD 0x01
/* AMSG parameter */
-#define PP_FP 0x80
+#define PP_FP 0x80
#define CT 0x40
#define NT 0x20 /* NT/CTSEND mapped on same bit */
#define CTSEND 0x20
@@ -1071,8 +1071,8 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */
-/*
- * Some macros to mask the VEGA+ interrupt sources
+/*
+ * Some macros to mask the VEGA+ interrupt sources
******************************************************************************
*/
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
index 7d31234c53..6cca55980b 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S
@@ -14,16 +14,16 @@
#define __asm__
#include <registers.h>
-
-/*
- * Function to obtain, execute an IT handler and acknowledge the IT
+
+/*
+ * Function to obtain, execute an IT handler and acknowledge the IT
*/
.globl ExecuteITHandler
-
-ExecuteITHandler :
+
+ExecuteITHandler :
ldr r0, =INTPHAI3 /* read the vector number */
- ldr r0, [r0]
+ ldr r0, [r0]
ldr r0, [r0] /* extract the IT handler @ */
/*
@@ -52,14 +52,14 @@ IRQ_return:
msr cpsr, r0
mov pc, lr
-
-/*
- * Function to acknowledge the IT controller
+
+/*
+ * Function to acknowledge the IT controller
*/
.globl AckControler
-#if 0
-AckControler:
+#if 0
+AckControler:
ldr r0, =INTEOI3
mov r1, #EOI
str r1, [r0]
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
index 4a220e1462..7807d89181 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c
@@ -21,7 +21,7 @@ void BSP_rtems_irq_mngt_init() {
/* Initialize the vector table address in internal RAM */
Regs[INTTAB] = VECTOR_TABLE;
-
+
/* Initialize the GLOBAL INT CONTROL register */
Regs[INTGCNTL] = 0x00;
@@ -33,7 +33,7 @@ void BSP_rtems_irq_mngt_init() {
/* Ack pending interrupt */
while ( ( Regs[INTSTAT] & 0xF433 ) != 0 ) {
- Regs[INTACK] = 0xFFFF;
+ Regs[INTACK] = 0xFFFF;
Regs[INTEOI] = EOI;
}
}
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
index 453ccf3d95..55c1590bdf 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c
@@ -40,7 +40,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
if (*(HdlTable + irq->name) != default_int_handler) {
return 0;
}
-
+
_CPU_ISR_Disable(level);
/*
@@ -60,7 +60,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
*(HdlTable + irq->name) = irq->hdl;
/*
- * initialize the control register for the concerned interrupt
+ * initialize the control register for the concerned interrupt
*/
Regs[(INTCNTL0 + irq->name)] = (long)(irq->irqTrigger) | (long)(irq->irqLevel) ;
@@ -68,17 +68,17 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq)
* ack pending interrupt
*/
Regs[INTACK] |= (long)(1 << irq->name);
-
+
/*
* unmask at INT controler level level
*/
Regs[INTMASK] &= ~(long)(1 << irq->name);
-
+
/*
* Enable interrupt on device
*/
irq->on(irq);
-
+
_CPU_ISR_Enable(level);
return 1;
@@ -88,7 +88,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
{
rtems_irq_hdl *HdlTable;
rtems_interrupt_level level;
-
+
if (!isValidInterrupt(irq->name)) {
return 0;
}
@@ -115,7 +115,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq)
* restore the default irq value
*/
*(HdlTable + irq->name) = default_int_handler;
-
+
_CPU_ISR_Enable(level);
return 1;
diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
index 116f528640..5857792ebe 100644
--- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
+++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h
@@ -22,7 +22,7 @@ extern "C" {
/*
* Include some preprocessor value also used by assember code
*/
-
+
#include <rtems.h>
extern void default_int_handler();
@@ -62,11 +62,11 @@ typedef enum {
#define MASKIRQ 0x80
#define MASKFIQ 0x40
-
+
#define END_OF_INT 0x80
#define VECTOR_TABLE 0x40
-
+
/*
* Type definition for RTEMS managed interrupts
*/
@@ -96,9 +96,9 @@ typedef struct __rtems_irq_connect_data__ {
* It is usually called immediately AFTER connecting the interrupt handler.
* RTEMS may well need such a function when restoring normal interrupt
* processing after a debug session.
- *
+ *
*/
- rtems_irq_enable on;
+ rtems_irq_enable on;
/*
* function for disabling interrupts at device level (ONLY!).
* The code will disable it at i8259s level. RATIONALE : anyway
@@ -168,7 +168,7 @@ void BSP_rtems_irq_mngt_init();
* 4) perform rescheduling when necessary,
* 5) restore the C scratch registers...
* 6) restore initial execution flow
- *
+ *
*/
int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*);
diff --git a/c/src/lib/libbsp/arm/vegaplus/start/start.S b/c/src/lib/libbsp/arm/vegaplus/start/start.S
index e811d1cac8..6c3c2ab141 100644
--- a/c/src/lib/libbsp/arm/vegaplus/start/start.S
+++ b/c/src/lib/libbsp/arm/vegaplus/start/start.S
@@ -9,7 +9,7 @@
* http://www.rtems.com/license/LICENSE.
*
*/
-
+
/* Register definition */
.equ CNTL_BASE_ADR, 0xF3000 /* Base address of registers */
@@ -22,7 +22,7 @@
.equ CSCNTL1_2, 0x0C28 /* Offset of CS0CNTL */
.equ CNTL_CLK_ADR, 0xF2000 /* Base address of registers */
.equ CLKCNTL, 0x08F4 /* Offset of CS0CNTL */
-.equ INTHPAI, 0x0800
+.equ INTHPAI, 0x0800
.equ INTEOI, 0x0808
.equ EOI, 0x80
@@ -47,37 +47,37 @@
.equ MARK_STACK, 0 /*Fill every stack with a pattern for debug (0 or 1)*/
-
+
/*-----------------------------------------------------------------------------
* Definitions
----------------------------------------------------------------------------*/
.equ PID_RAM_Limit, 0x1800
/* stack size definition */
-.equ FIQ_StackSize, 0x400 /* FIQ stack size */
-.equ IRQ_StackSize, 0xE00 /* IRQ stack size */
-.equ SVC_StackSize, 0x200 /* SVC stack size */
-.equ ABORT_StackSize, 0x100 /* ABORT stack size */
-.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */
+.equ FIQ_StackSize, 0x400 /* FIQ stack size */
+.equ IRQ_StackSize, 0xE00 /* IRQ stack size */
+.equ SVC_StackSize, 0x200 /* SVC stack size */
+.equ ABORT_StackSize, 0x100 /* ABORT stack size */
+.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */
/* sack size address */
-.equ Stack_Limit, PID_RAM_Limit
+.equ Stack_Limit, PID_RAM_Limit
.equ SVC_Stack, Stack_Limit
-.equ ABORT_Stack, Stack_Limit - SVC_StackSize
-.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize
-.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize
-.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize
+.equ ABORT_Stack, Stack_Limit - SVC_StackSize
+.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize
+.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize
+.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize
.equ END_FIQ, FIQ_Stack - FIQ_StackSize
.text
.globl _start
-/*
+/*
* This "strange" code is used to switch the memory access
- * from 8 bits to 16 bits, because the vega plus accesses
+ * from 8 bits to 16 bits, because the vega plus accesses
* the memory via 8 bits at reset time
*/
-
+
_start:
.long 0x00300010 /*LDR r3,0x18*/
.long 0x00E5009F
@@ -106,7 +106,7 @@ _start:
.code 32
/* --- Initialise external bus*/
-Real_start:
+Real_start:
MOV r0,#CNTL_BASE_ADR
/*Load timing configuration of CS0*/
@@ -116,7 +116,7 @@ Real_start:
STR r1, [r0,#CSCNTL1_0]
/* Load timing configuration and access mode of CS1
- NOTE : Important for macro REGION_INIT of Region_init.s
+ NOTE : Important for macro REGION_INIT of Region_init.s
if initialisation of data in external RAM */
LDR r1, =0x2200
STR r1, [r0,#CSCNTL0_1]
@@ -128,7 +128,7 @@ Real_start:
STR r1, [r0,#CSCNTL0_2]
LDR r1, =0xA2
STR r1, [r0,#CSCNTL1_2]
-
+
MOV r0,#CNTL_CLK_ADR
/* Load clock mode 55 MHz */
@@ -140,7 +140,7 @@ Real_start:
LDR r1, =0x400000 /* execution address of region */
LDR r2, =_edata /* copy execution address into r2 */
-copy:
+copy:
CMP r1, r2 /* loop whilst r1 < r2 */
LDRLO r3, [r0], #4
STRLO r3, [r1], #4
@@ -149,15 +149,15 @@ copy:
/* zero the bss */
LDR r1, =__bss_end__ /* get end of ZI region */
LDR r0, =__bss_start__ /* load base address of ZI region */
-zi_init:
+zi_init:
MOV r2, #0
CMP r0, r1 /* loop whilst r0 < r1 */
STRLOT r2, [r0], #4
- BLO zi_init
+ BLO zi_init
+
-
/* Load basic ARM7 interrupt table */
-VectorInit:
+VectorInit:
MOV R8, #0
ADR R9, Vector_Init_Block
LDMIA R9!, {R0-R7} /* Copy the Vectors (8 words) */
@@ -169,10 +169,10 @@ VectorInit:
/*******************************************************
standard exception vectors table
- *** Must be located at address 0
-********************************************************/
+ *** Must be located at address 0
+********************************************************/
-Vector_Init_Block:
+Vector_Init_Block:
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
@@ -183,36 +183,36 @@ Vector_Init_Block:
LDR PC, FIQ_Addr
.globl Reset_Addr
-Reset_Addr: .long _start
+Reset_Addr: .long _start
Undefined_Addr: .long Undefined_Handler
SWI_Addr: .long SWI_Handler
Prefetch_Addr: .long Prefetch_Handler
Abort_Addr: .long Abort_Handler
- .long 0
+ .long 0
IRQ_Addr: .long IRQ_Handler
FIQ_Addr: .long FIQ_Handler
-
+
/* The following handlers do not do anything useful */
.globl Undefined_Handler
-Undefined_Handler:
+Undefined_Handler:
B Undefined_Handler
.globl SWI_Handler
-SWI_Handler:
- B SWI_Handler
+SWI_Handler:
+ B SWI_Handler
.globl Prefetch_Handler
-Prefetch_Handler:
+Prefetch_Handler:
B Prefetch_Handler
.globl Abort_Handler
-Abort_Handler:
+Abort_Handler:
B Abort_Handler
.globl IRQ_Handler
-IRQ_Handler:
+IRQ_Handler:
B IRQ_Handler
.globl FIQ_Handler
-FIQ_Handler:
+FIQ_Handler:
B FIQ_Handler
-init2 :
+init2 :
/* --- Initialise stack pointer registers
Set up the ABORT stack pointer last and stay in SVC mode */
MOV r0, #(Mode_ABORT | I_Bit | F_Bit) /* No interrupts */
diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
index fdeb345b53..3af8289599 100644
--- a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
+++ b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c
@@ -1,7 +1,7 @@
/*-------------------------------------------------------------------------+
| This file contains the ARM BSP startup package. It includes application,
| board, and monitor specific initialization and configuration. The generic CPU
-| dependent initialization has been performed before this routine is invoked.
+| dependent initialization has been performed before this routine is invoked.
+--------------------------------------------------------------------------+
|
| Copyright (c) 2000 Canon Research Centre France SA.
@@ -26,11 +26,11 @@
volatile unsigned long *Regs = (unsigned long*)0xF0000; /* Chip registers */
extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */
-/*
- * Size of heap if it is 0 it will be dynamically defined by memory size,
- * otherwise the value should be changed by binary patch
+/*
+ * Size of heap if it is 0 it will be dynamically defined by memory size,
+ * otherwise the value should be changed by binary patch
*/
-uint32_t _heap_size = 0;
+uint32_t _heap_size = 0;
/* Size of stack used during initialization. Defined in 'start.s'. */
extern uint32_t _stack_size;
@@ -63,7 +63,7 @@ void bsp_postdriver_hook(void);
| since drivers are not yet initialized.
| Global Variables: None.
| Arguments: None.
-| Returns: Nothing.
+| Returns: Nothing.
+--------------------------------------------------------------------------*/
void bsp_pretasking_hook(void)
{
@@ -72,9 +72,9 @@ void bsp_pretasking_hook(void)
{
_heap_size = 0x420000 - rtemsFreeMemStart;
}
-
+
bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0);
-
+
rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */
@@ -85,14 +85,14 @@ void bsp_pretasking_hook(void)
#endif /* RTEMS_DEBUG */
} /* bsp_pretasking_hook */
-
+
/*-------------------------------------------------------------------------+
| Function: bsp_start
| Description: Called before main is invoked.
| Global Variables: None.
| Arguments: None.
-| Returns: Nothing.
+| Returns: Nothing.
+--------------------------------------------------------------------------*/
void bsp_start_default( void )
{
@@ -112,7 +112,7 @@ void bsp_start_default( void )
/* Place RTEMS workspace at beginning of free memory. */
BSP_Configuration.work_space_start = (void *)rtemsFreeMemStart;
-
+
rtemsFreeMemStart += BSP_Configuration.work_space_size;
/*
diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
index 447a34301e..a99faeb9ba 100644
--- a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
+++ b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c
@@ -1,5 +1,5 @@
/*-------------------------------------------------------------------------+
-| exit.c - ARM BSP
+| exit.c - ARM BSP
+--------------------------------------------------------------------------+
| Routines to shutdown and reboot the BSP.
+--------------------------------------------------------------------------+