diff options
| author | Ralf Kirchner <ralf.kirchner@embedded-brains.de> | 2014-02-17 11:57:19 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-03-13 16:10:54 +0100 |
| commit | 0b74e10fff05de92b15bf29de8608951cb5370fa (patch) | |
| tree | 1eda5a34d26c22aa25a8e5c5ab6bc8c474e889e2 /c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h | |
| parent | bsp/xilinx-zynq: Add arm-errata.h and arm-release-id.h (diff) | |
| download | rtems-0b74e10fff05de92b15bf29de8608951cb5370fa.tar.bz2 | |
bsp/arm: Add SCU errata handling for L2C-310 cache
Diffstat (limited to 'c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h')
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h index 28640d2a42..861d1aea83 100644 --- a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h +++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h @@ -58,7 +58,10 @@ typedef struct { #define A9MPCORE_SCU_INVSS_CPU3(ways) BSP_FLD32(val, 12, 15) #define A9MPCORE_SCU_INVSS_CPU3_GET(reg) /* Write only register */ #define A9MPCORE_SCU_INVSS_CPU3_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15) - uint32_t reserved_10[12]; + uint32_t reserved_09[8]; + uint32_t diagn_ctrl; +#define A9MPCORE_SCU_DIAGN_CTRL_MIGRATORY_BIT_DISABLE BSP_BIT32(0) + uint32_t reserved_10[3]; uint32_t fltstart; uint32_t fltend; uint32_t reserved_48[2]; |