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| author | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2009-12-15 15:20:47 +0000 |
|---|---|---|
| committer | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | 2009-12-15 15:20:47 +0000 |
| commit | c468f18bb73a570bf2b3eb279a7dea60b91c3319 (patch) | |
| tree | b181297c2b4a0f8fa3edbb9987fd99a3ecc45a8b /c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore | |
| parent | add support for ARM11, reimplement nested interrupts (diff) | |
| download | rtems-c468f18bb73a570bf2b3eb279a7dea60b91c3319.tar.bz2 | |
add support for LPC32xx
Diffstat (limited to 'c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore')
| -rw-r--r-- | c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore new file mode 100644 index 0000000000..8003ecc996 --- /dev/null +++ b/c/src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore @@ -0,0 +1,60 @@ +/** + * @file + * + * @ingroup lpc32xx_linker_phycore + * + * @brief Memory map. + */ + +/** + * @defgroup lpc32xx_linker_phycore phyCORE-LPC3250 Memory Map + * + * @ingroup bsp_linker + * + * @brief phyCORE-LPC3250 memory map. + * + * <table> + * <tr><th>Region Name</th><th>Region Begin</th><th>Region Size</th></tr> + * <tr><td>RAM_INT</td><td>0x08000000</td><td>256k</td></tr> + * <tr><td>RAM_EXT</td><td>0x80000000</td><td>64M</td></tr> + * <tr><td>ROM_EXT</td><td>0xe0000000</td><td>2M</td></tr> + * </table> + * + * <table> + * <tr><th>Section Name</th><th>Section Runtime Region</th><th>Section Load Region</th></tr> + * <tr><td>.start</td><td>RAM_EXT</td><td></td></tr> + * <tr><td>.vector</td><td>RAM_INT</td><td></td></tr> + * <tr><td>.text</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> + * <tr><td>.rodata</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> + * <tr><td>.data</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> + * <tr><td>.fast</td><td>RAM_EXT</td><td>RAM_EXT</td></tr> + * <tr><td>.bss</td><td>RAM_EXT</td><td></td></tr> + * <tr><td>.work</td><td>RAM_EXT</td><td></td></tr> + * <tr><td>.stack</td><td>RAM_INT</td><td></td></tr> + * </table> + */ + +MEMORY { + RAM_INT (AIW) : ORIGIN = 0x08000000, LENGTH = 256k + RAM_EXT (AIW) : ORIGIN = 0x80000000, LENGTH = 64M /* SDRAM on DYCS0 */ + ROM_EXT (RX) : ORIGIN = 0xe0000000, LENGTH = 2M /* NOR flash on CS0 */ + NIRVANA : ORIGIN = 0, LENGTH = 0 +} + +REGION_ALIAS ("REGION_START", RAM_EXT); +REGION_ALIAS ("REGION_VECTOR", RAM_INT); +REGION_ALIAS ("REGION_TEXT", RAM_EXT); +REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT); +REGION_ALIAS ("REGION_RODATA", RAM_EXT); +REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT); +REGION_ALIAS ("REGION_DATA", RAM_EXT); +REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT); +REGION_ALIAS ("REGION_FAST", RAM_EXT); +REGION_ALIAS ("REGION_FAST_LOAD", RAM_EXT); +REGION_ALIAS ("REGION_BSS", RAM_EXT); +REGION_ALIAS ("REGION_WORK", RAM_EXT); +REGION_ALIAS ("REGION_STACK", RAM_INT); + +bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; + +INCLUDE linkcmds.base |