diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-10-12 10:06:15 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-10-12 15:37:09 +0200 |
| commit | f72b2de10a255ab154f9c60e80bb33631b5c7348 (patch) | |
| tree | 0eee9148858fd78262aeb345675608991c7e1ed9 /c/src/lib/libbsp/arm/lpc24xx/startup | |
| parent | bsp/lpc24xx: Use 96MHz CCLK for LPC17XX EA BSP (diff) | |
| download | rtems-f72b2de10a255ab154f9c60e80bb33631b5c7348.tar.bz2 | |
bsp/lpc24xx: Fix PCLK clock divider calculation
Diffstat (limited to 'c/src/lib/libbsp/arm/lpc24xx/startup')
| -rw-r--r-- | c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c index 3b198534c6..c80a91980e 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c @@ -313,7 +313,7 @@ static BSP_START_TEXT_SECTION void lpc17xx_set_pll( /* Set the CCLK, PCLK and EMCCLK divider */ scb->cclksel = cclksel_cclkdiv; - scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(LPC24XX_PCLKDIV); + scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(cclkdiv * LPC24XX_PCLKDIV); scb->emcclksel = LPC24XX_EMCCLKDIV == 1 ? 0 : LPC17XX_SCB_EMCCLKSEL_EMCDIV; /* Enable PLL */ |