From f72b2de10a255ab154f9c60e80bb33631b5c7348 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 12 Oct 2012 10:06:15 +0200 Subject: bsp/lpc24xx: Fix PCLK clock divider calculation --- c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'c/src/lib/libbsp/arm/lpc24xx/startup') diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c index 3b198534c6..c80a91980e 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c @@ -313,7 +313,7 @@ static BSP_START_TEXT_SECTION void lpc17xx_set_pll( /* Set the CCLK, PCLK and EMCCLK divider */ scb->cclksel = cclksel_cclkdiv; - scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(LPC24XX_PCLKDIV); + scb->pclksel = LPC17XX_SCB_PCLKSEL_PCLKDIV(cclkdiv * LPC24XX_PCLKDIV); scb->emcclksel = LPC24XX_EMCCLKDIV == 1 ? 0 : LPC17XX_SCB_EMCCLKSEL_EMCDIV; /* Enable PLL */ -- cgit v1.2.3