2011-11-08 Sebastian Huber <sebastian.huber@embedded-brains.de>

	* include/lpc17xx.h: New file.
	* Makefile.am, preinstall.am: Reflect change above.  Update due to API
	changes.
	* configure.ac, console/console-config.c, include/bsp.h, include/io.h,
	include/irq.h, include/lcd.h, include/lpc-clock-config.h,
	include/lpc24xx.h, include/start-config.h, irq/irq-dispatch.c,
	irq/irq.c, misc/bspidle.c, misc/io.c, misc/lcd.c, misc/restart.c,
	misc/system-clocks.c, ssp/ssp.c, startup/bspreset.c,
	startup/bspstart.c, startup/bspstarthooks.c,
	startup/start-config-emc-dynamic.c, startup/start-config-emc-static.c,
	startup/start-config-pinsel.c: Basic support for LPC17XX.  New memory
	configurations for W9825G2JB75I, IS42S32800B, and SST39VF3201.

1 files changed, 61 insertions, 57 deletions

diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
index 6b9ddf8a37..d82946d35d 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h
@@ -7,25 +7,27 @@
  */
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
- * Obere Lagerstr. 30
- * D-82178 Puchheim
- * Germany
- * rtems@embedded-brains.de
+ * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
  *
- * The license and distribution terms for this file may be found in the file
- * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
  */
 
 #ifndef LIBBSP_ARM_LPC24XX_IRQ_H
 #define LIBBSP_ARM_LPC24XX_IRQ_H
 
 #ifndef ASM
-
-#include <rtems.h>
-#include <rtems/irq.h>
-#include <rtems/irq-extension.h>
+  #include <rtems.h>
+  #include <rtems/irq.h>
+  #include <rtems/irq-extension.h>
+#endif
 
 /**
  * @addtogroup bsp_interrupt
@@ -33,61 +35,63 @@
  * @{
  */
 
-#define LPC24XX_IRQ_WDT 0
-#define LPC24XX_IRQ_SOFTWARE 1
-#define LPC24XX_IRQ_ARM_CORE_0 2
-#define LPC24XX_IRQ_ARM_CORE_1 3
-#define LPC24XX_IRQ_TIMER_0 4
-#define LPC24XX_IRQ_TIMER_1 5
-#define LPC24XX_IRQ_UART_0 6
-#define LPC24XX_IRQ_UART_1 7
-#define LPC24XX_IRQ_PWM 8
-#define LPC24XX_IRQ_I2C_0 9
-#define LPC24XX_IRQ_SPI_SSP_0 10
-#define LPC24XX_IRQ_SSP_1 11
-#define LPC24XX_IRQ_PLL 12
-#define LPC24XX_IRQ_RTC 13
-#define LPC24XX_IRQ_EINT_0 14
-#define LPC24XX_IRQ_EINT_1 15
-#define LPC24XX_IRQ_EINT_2 16
-#define LPC24XX_IRQ_EINT_3 17
-#define LPC24XX_IRQ_ADC_0 18
-#define LPC24XX_IRQ_I2C_1 19
-#define LPC24XX_IRQ_BOD 20
-#define LPC24XX_IRQ_ETHERNET 21
-#define LPC24XX_IRQ_USB 22
-#define LPC24XX_IRQ_CAN 23
-#define LPC24XX_IRQ_SD_MMC 24
-#define LPC24XX_IRQ_DMA 25
-#define LPC24XX_IRQ_TIMER_2 26
-#define LPC24XX_IRQ_TIMER_3 27
-#define LPC24XX_IRQ_UART_2 28
-#define LPC24XX_IRQ_UART_3 29
-#define LPC24XX_IRQ_I2C_2 30
-#define LPC24XX_IRQ_I2S 31
+#define BSP_INTERRUPT_VECTOR_MIN 0
+
+#ifdef ARM_MULTILIB_ARCH_V4
+  #define LPC24XX_IRQ_WDT 0
+  #define LPC24XX_IRQ_SOFTWARE 1
+  #define LPC24XX_IRQ_ARM_CORE_0 2
+  #define LPC24XX_IRQ_ARM_CORE_1 3
+  #define LPC24XX_IRQ_TIMER_0 4
+  #define LPC24XX_IRQ_TIMER_1 5
+  #define LPC24XX_IRQ_UART_0 6
+  #define LPC24XX_IRQ_UART_1 7
+  #define LPC24XX_IRQ_PWM 8
+  #define LPC24XX_IRQ_I2C_0 9
+  #define LPC24XX_IRQ_SPI_SSP_0 10
+  #define LPC24XX_IRQ_SSP_1 11
+  #define LPC24XX_IRQ_PLL 12
+  #define LPC24XX_IRQ_RTC 13
+  #define LPC24XX_IRQ_EINT_0 14
+  #define LPC24XX_IRQ_EINT_1 15
+  #define LPC24XX_IRQ_EINT_2 16
+  #define LPC24XX_IRQ_EINT_3 17
+  #define LPC24XX_IRQ_ADC_0 18
+  #define LPC24XX_IRQ_I2C_1 19
+  #define LPC24XX_IRQ_BOD 20
+  #define LPC24XX_IRQ_ETHERNET 21
+  #define LPC24XX_IRQ_USB 22
+  #define LPC24XX_IRQ_CAN 23
+  #define LPC24XX_IRQ_SD_MMC 24
+  #define LPC24XX_IRQ_DMA 25
+  #define LPC24XX_IRQ_TIMER_2 26
+  #define LPC24XX_IRQ_TIMER_3 27
+  #define LPC24XX_IRQ_UART_2 28
+  #define LPC24XX_IRQ_UART_3 29
+  #define LPC24XX_IRQ_I2C_2 30
+  #define LPC24XX_IRQ_I2S 31
+
+  #define BSP_INTERRUPT_VECTOR_MAX 31
+#endif
 
-#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0U
-#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15U
-#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1U)
+#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
+#ifdef ARM_MULTILIB_ARCH_V4
+  #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+#endif
+#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
 #define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
 #define LPC24XX_IRQ_PRIORITY_LOWEST LPC24XX_IRQ_PRIORITY_VALUE_MAX
 
-/**
- * @brief Minimum vector number.
- */
-#define BSP_INTERRUPT_VECTOR_MIN LPC24XX_IRQ_WDT
-
-/**
- * @brief Maximum vector number.
- */
-#define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S
+#ifndef ASM
 
 void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority);
 
 unsigned lpc24xx_irq_get_priority(rtems_vector_number vector);
 
-/** @} */
+void bsp_interrupt_dispatch(void);
 
 #endif /* ASM */
 
+/** @} */
+
 #endif /* LIBBSP_ARM_LPC24XX_IRQ_H */