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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-12-20 15:39:19 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1995-12-20 15:39:19 +0000 |
| commit | 5c491aef41558df022032b543d826ef4e49493b5 (patch) | |
| tree | 248c4d31610a83b98c65dc26fb6a9b54b9db77e1 /c/src/exec/score/cpu/powerpc/cpu.h | |
| parent | initial history lost in disk crash (diff) | |
| download | rtems-5c491aef41558df022032b543d826ef4e49493b5.tar.bz2 | |
changes remerged after lost in disk crash -- recovered from snapshot, partially recovered working tree, etc
Diffstat (limited to 'c/src/exec/score/cpu/powerpc/cpu.h')
| -rw-r--r-- | c/src/exec/score/cpu/powerpc/cpu.h | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/c/src/exec/score/cpu/powerpc/cpu.h b/c/src/exec/score/cpu/powerpc/cpu.h index 8bbc341268..fc2868cccf 100644 --- a/c/src/exec/score/cpu/powerpc/cpu.h +++ b/c/src/exec/score/cpu/powerpc/cpu.h @@ -3,7 +3,7 @@ * This include file contains information pertaining to the PowerPC * processor. * - * Author: Andrew Bray <andy@i-cubed.demon.co.uk> + * Author: Andrew Bray <andy@i-cubed.co.uk> * * COPYRIGHT (c) 1995 by i-cubed ltd. * @@ -495,6 +495,10 @@ EXTERN void *_CPU_Interrupt_stack_high; */ EXTERN struct { + unsigned32 *Nest_level; + unsigned32 *Disable_level; + void *Vector_table; + void *Stack; #if (PPC_ABI == PPC_ABI_POWEROPEN) unsigned32 Dispatch_r2; #else @@ -503,10 +507,6 @@ EXTERN struct { unsigned32 Default_r13; #endif #endif - unsigned32 *Nest_level; - unsigned32 *Disable_level; - void *Vector_table; - void *Stack; boolean *Switch_necessary; boolean *Signal; } _CPU_IRQ_info CPU_STRUCTURE_ALIGNMENT; @@ -541,7 +541,7 @@ EXTERN struct { * by RTEMS. */ -#define CPU_INTERRUPT_NUMBER_OF_VECTORS (PPC_INTERRUPT_MAX) +#define CPU_INTERRUPT_NUMBER_OF_VECTORS (PPC_INTERRUPT_MAX) #define CPU_INTERRUPT_MAXIMUM_VECTOR_NUMBER (CPU_INTERRUPT_NUMBER_OF_VECTORS - 1) /* @@ -570,7 +570,7 @@ EXTERN struct { * be greater or equal to than CPU_ALIGNMENT. */ -#define CPU_HEAP_ALIGNMENT (PPC_CACHE_ALIGNMENT) +#define CPU_HEAP_ALIGNMENT (PPC_ALIGNMENT) /* * This number corresponds to the byte alignment requirement for memory @@ -584,7 +584,7 @@ EXTERN struct { * be greater or equal to than CPU_ALIGNMENT. */ -#define CPU_PARTITION_ALIGNMENT (PPC_CACHE_ALIGNMENT) +#define CPU_PARTITION_ALIGNMENT (PPC_ALIGNMENT) /* * This number corresponds to the byte alignment requirement for the @@ -604,6 +604,8 @@ EXTERN struct { * level is returned in _level. */ +#define loc_string(a,b) a " (" #b ")\n" + #define _CPU_ISR_Disable( _isr_cookie ) \ { \ asm volatile ( \ @@ -661,6 +663,8 @@ EXTERN struct { ); \ } +unsigned32 _CPU_ISR_Get_level( void ); + /* end of ISR handler macros */ /* Context handler macros */ @@ -817,11 +821,11 @@ EXTERN struct { * * RTEMS guarantees that (1) will never happen so it is not a concern. * (2),(3), (4) are handled by the macros _CPU_Priority_mask() and - * _CPU_Priority_bits_index(). These three form a set of routines + * _CPU_Priority_Bits_index(). These three form a set of routines * which must logically operate together. Bits in the _value are * set and cleared based on masks built by _CPU_Priority_mask(). * The basic major and minor values calculated by _Priority_Major() - * and _Priority_Minor() are "massaged" by _CPU_Priority_bits_index() + * and _Priority_Minor() are "massaged" by _CPU_Priority_Bits_index() * to properly range between the values returned by the "find first bit" * instruction. This makes it possible for _Priority_Get_highest() to * calculate the major and directly index into the minor table. @@ -856,9 +860,6 @@ EXTERN struct { * bit set */ -#define CPU_USE_GENERIC_BITFIELD_CODE FALSE -#define CPU_USE_GENERIC_BITFIELD_DATA FALSE - #define _CPU_Bitfield_Find_first_bit( _value, _output ) \ { \ asm volatile ("cntlzw %0, %1" : "=r" ((_output)), "=r" ((_value)) : \ |