Moved to proper rtems/score

3 files changed, 291 insertions, 0 deletions

diff --git a/c/src/exec/score/cpu/mips64orion/rtems/score/asm.h b/c/src/exec/score/cpu/mips64orion/rtems/score/asm.h
new file mode 100644
index 0000000000..2d322c2339
--- /dev/null
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/asm.h
@@ -0,0 +1,102 @@
+/*  asm.h
+ *
+ *  This include file attempts to address the problems
+ *  caused by incompatible flavors of assemblers and
+ *  toolsets.  It primarily addresses variations in the
+ *  use of leading underscores on symbols and the requirement
+ *  that register names be preceded by a %.
+ *
+ *
+ *  NOTE: The spacing in the use of these macros
+ *        is critical to them working as advertised.
+ *
+ *  COPYRIGHT:
+ *
+ *  This file is based on similar code found in newlib available
+ *  from ftp.cygnus.com.  The file which was used had no copyright
+ *  notice.  This file is freely distributable as long as the source
+ *  of the file is noted.  This file is:
+ *
+ *  COPYRIGHT (c) 1994-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  $Id$
+ */
+/* @(#)asm.h       03/15/96     1.1 */
+
+#ifndef __NO_CPU_ASM_h
+#define __NO_CPU_ASM_h
+
+/*
+ *  Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+#include <rtems/score/targopts.h>
+#include <rtems/score/mips64orion.h>
+
+/*
+ *  Recent versions of GNU cpp define variables which indicate the
+ *  need for underscores and percents.  If not using GNU cpp or
+ *  the version does not support this, then you will obviously
+ *  have to define these as appropriate.
+ */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__ _
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+/* ANSI concatenation macros.  */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels.  */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers.  */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/*
+ *  define macros for all of the registers on this CPU
+ *
+ *  EXAMPLE:     #define d0 REG (d0)
+ */
+
+/*
+ *  Define macros to handle section beginning and ends.
+ */
+
+
+#define BEGIN_CODE_DCL .text
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .data
+#define END_DATA_DCL
+#define BEGIN_CODE .text
+#define END_CODE
+#define BEGIN_DATA
+#define END_DATA
+#define BEGIN_BSS
+#define END_BSS
+#define END
+
+/*
+ *  Following must be tailor for a particular flavor of the C compiler.
+ *  They may need to put underscores in front of the symbols.
+ */
+
+#define PUBLIC(sym) .globl SYM (sym)
+#define EXTERN(sym) .globl SYM (sym)
+
+#endif
+/* end of include file */
+
+
diff --git a/c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h
new file mode 100644
index 0000000000..5d78f39d7c
--- /dev/null
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h
@@ -0,0 +1,115 @@
+/*
+ *  cpu_asm.h
+ *
+ *  Author:     Craig Lebakken <craigl@transition.com>
+ *
+ *  COPYRIGHT (c) 1996 by Transition Networks Inc.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of Transition Networks not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      Transition Networks makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  Derived from c/src/exec/score/cpu/no_cpu/cpu_asm.h:
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ *
+ */
+/* @(#)cpu_asm.h       08/20/96     1.2 */
+
+#ifndef __CPU_ASM_h
+#define __CPU_ASM_h
+
+/* pull in the generated offsets */
+
+/* #include <rtems/score/offsets.h> */
+
+/*
+ * Hardware General Registers
+ */
+
+/* put something here */
+
+/*
+ * Hardware Floating Point Registers
+ */
+
+#define R_FP0 	0
+#define R_FP1 	1
+#define R_FP2 	2
+#define R_FP3 	3
+#define R_FP4 	4
+#define R_FP5 	5
+#define R_FP6 	6
+#define R_FP7 	7
+#define R_FP8 	8
+#define R_FP9 	9
+#define R_FP10 	10
+#define R_FP11 	11
+#define R_FP12 	12
+#define R_FP13 	13
+#define R_FP14 	14
+#define R_FP15 	15
+#define R_FP16 	16
+#define R_FP17 	17
+#define R_FP18 	18
+#define R_FP19 	19
+#define R_FP20 	20
+#define R_FP21 	21
+#define R_FP22 	22
+#define R_FP23	23
+#define R_FP24 	24
+#define R_FP25 	25
+#define R_FP26 	26
+#define R_FP27 	27
+#define R_FP28 	28
+#define R_FP29 	29
+#define R_FP30 	30
+#define R_FP31 	31
+
+/*
+ * Hardware Control Registers
+ */
+
+/* put something here */
+
+/*
+ * Calling Convention
+ */
+
+/* put something here */
+
+/*
+ * Temporary registers
+ */
+
+/* put something here */
+
+/*
+ * Floating Point Registers - SW Conventions
+ */
+
+/* put something here */
+
+/*
+ * Temporary floating point registers
+ */
+
+/* put something here */
+
+#endif
+
+/* end of file */
diff --git a/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h b/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h
new file mode 100644
index 0000000000..ec89a32a0d
--- /dev/null
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h
@@ -0,0 +1,74 @@
+/*  mips64orion.h
+ *
+ *  Author:     Craig Lebakken <craigl@transition.com>
+ *
+ *  COPYRIGHT (c) 1996 by Transition Networks Inc.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of Transition Networks not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      Transition Networks makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  Derived from c/src/exec/score/cpu/no_cpu/no_cpu.h:
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+/* @(#)mips64orion.h       08/29/96     1.3 */
+
+#ifndef _INCLUDE_MIPS64ORION_h
+#define _INCLUDE_MIPS64ORION_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ *  This file contains the information required to build
+ *  RTEMS for a particular member of the "no cpu"
+ *  family when executing in protected mode.  It does
+ *  this by setting variables to indicate which implementation
+ *  dependent features are present in a particular member
+ *  of the family.
+ */
+ 
+#if defined(R4650)
+ 
+#define CPU_MODEL_NAME  "R4650"
+#define MIPS64ORION_HAS_FPU     1
+ 
+#elif defined(R4600)
+ 
+#define CPU_MODEL_NAME  "R4600"
+#define MIPS64ORION_HAS_FPU     1
+
+#else
+ 
+#error "Unsupported CPU Model"
+ 
+#endif
+
+/*
+ *  Define the name of the CPU family.
+ */
+
+#define CPU_NAME "MIPS R46xxx"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_MIPS64ORION_h */
+/* end of include file */