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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-02-19 23:26:19 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-02-19 23:26:19 +0000
commit77138089c5989df44341e9a58ab212881294e327 (patch)
tree61d1015d21a6f9898c0d4114b2d31ab8881541e4 /c/src/exec/score
parentAdded new PowerPC boards. (diff)
downloadrtems-77138089c5989df44341e9a58ab212881294e327.tar.bz2
Moved to proper rtems/score
Diffstat (limited to 'c/src/exec/score')
-rw-r--r--c/src/exec/score/cpu/a29k/rtems/score/cpu_asm.h (renamed from c/src/exec/score/cpu/a29k/cpu_asm.h)0
-rw-r--r--c/src/exec/score/cpu/i386/rtems/score/asm.h (renamed from c/src/exec/score/cpu/i386/asm.h)0
-rw-r--r--c/src/exec/score/cpu/i960/rtems/score/asm.h (renamed from c/src/exec/score/cpu/i960/asm.h)0
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/asm.h (renamed from c/src/exec/score/cpu/m68k/asm.h)0
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/m68302.h (renamed from c/src/exec/score/cpu/m68k/m68302.h)0
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/m68360.h (renamed from c/src/exec/score/cpu/m68k/m68360.h)0
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/qsm.h (renamed from c/src/exec/score/cpu/m68k/qsm.h)0
-rw-r--r--c/src/exec/score/cpu/m68k/rtems/score/sim.h (renamed from c/src/exec/score/cpu/m68k/sim.h)0
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/mips.h (renamed from c/src/exec/score/cpu/mips64orion/mips64orion.h)0
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/mips64orion.h74
-rw-r--r--c/src/exec/score/cpu/mips64orion/asm.h102
-rw-r--r--c/src/exec/score/cpu/mips64orion/cpu_asm.h115
-rw-r--r--c/src/exec/score/cpu/mips64orion/rtems/score/asm.h (renamed from c/src/exec/score/cpu/mips/asm.h)0
-rw-r--r--c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h (renamed from c/src/exec/score/cpu/mips/cpu_asm.h)0
-rw-r--r--c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h74
-rw-r--r--c/src/exec/score/cpu/no_cpu/rtems/score/asm.h (renamed from c/src/exec/score/cpu/no_cpu/asm.h)0
-rw-r--r--c/src/exec/score/cpu/no_cpu/rtems/score/cpu_asm.h (renamed from c/src/exec/score/cpu/no_cpu/cpu_asm.h)0
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/score/asm.h275
-rw-r--r--c/src/exec/score/cpu/powerpc/rtems/score/mpc860.h (renamed from c/src/exec/score/cpu/powerpc/mpc860.h)0
-rw-r--r--c/src/exec/score/cpu/sh/rtems/score/asm.h (renamed from c/src/exec/score/cpu/sh/asm.h)0
-rw-r--r--c/src/exec/score/cpu/sparc/rtems/score/asm.h (renamed from c/src/exec/score/cpu/sparc/asm.h)0
-rw-r--r--c/src/exec/score/cpu/sparc/rtems/score/erc32.h (renamed from c/src/exec/score/cpu/sparc/erc32.h)0
22 files changed, 423 insertions, 217 deletions
diff --git a/c/src/exec/score/cpu/a29k/cpu_asm.h b/c/src/exec/score/cpu/a29k/rtems/score/cpu_asm.h
index 65eaf29737..65eaf29737 100644
--- a/c/src/exec/score/cpu/a29k/cpu_asm.h
+++ b/c/src/exec/score/cpu/a29k/rtems/score/cpu_asm.h
diff --git a/c/src/exec/score/cpu/i386/asm.h b/c/src/exec/score/cpu/i386/rtems/score/asm.h
index 9fe867c04c..9fe867c04c 100644
--- a/c/src/exec/score/cpu/i386/asm.h
+++ b/c/src/exec/score/cpu/i386/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/i960/asm.h b/c/src/exec/score/cpu/i960/rtems/score/asm.h
index a9a0788925..a9a0788925 100644
--- a/c/src/exec/score/cpu/i960/asm.h
+++ b/c/src/exec/score/cpu/i960/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/m68k/asm.h b/c/src/exec/score/cpu/m68k/rtems/score/asm.h
index 456b213cb2..456b213cb2 100644
--- a/c/src/exec/score/cpu/m68k/asm.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/m68k/m68302.h b/c/src/exec/score/cpu/m68k/rtems/score/m68302.h
index 084ceac034..084ceac034 100644
--- a/c/src/exec/score/cpu/m68k/m68302.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/m68302.h
diff --git a/c/src/exec/score/cpu/m68k/m68360.h b/c/src/exec/score/cpu/m68k/rtems/score/m68360.h
index fd78fa1104..fd78fa1104 100644
--- a/c/src/exec/score/cpu/m68k/m68360.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/m68360.h
diff --git a/c/src/exec/score/cpu/m68k/qsm.h b/c/src/exec/score/cpu/m68k/rtems/score/qsm.h
index e1bf33bc12..e1bf33bc12 100644
--- a/c/src/exec/score/cpu/m68k/qsm.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/qsm.h
diff --git a/c/src/exec/score/cpu/m68k/sim.h b/c/src/exec/score/cpu/m68k/rtems/score/sim.h
index d70f56d360..d70f56d360 100644
--- a/c/src/exec/score/cpu/m68k/sim.h
+++ b/c/src/exec/score/cpu/m68k/rtems/score/sim.h
diff --git a/c/src/exec/score/cpu/mips64orion/mips64orion.h b/c/src/exec/score/cpu/mips/rtems/score/mips.h
index ec89a32a0d..ec89a32a0d 100644
--- a/c/src/exec/score/cpu/mips64orion/mips64orion.h
+++ b/c/src/exec/score/cpu/mips/rtems/score/mips.h
diff --git a/c/src/exec/score/cpu/mips/rtems/score/mips64orion.h b/c/src/exec/score/cpu/mips/rtems/score/mips64orion.h
new file mode 100644
index 0000000000..ec89a32a0d
--- /dev/null
+++ b/c/src/exec/score/cpu/mips/rtems/score/mips64orion.h
@@ -0,0 +1,74 @@
+/* mips64orion.h
+ *
+ * Author: Craig Lebakken <craigl@transition.com>
+ *
+ * COPYRIGHT (c) 1996 by Transition Networks Inc.
+ *
+ * To anyone who acknowledges that this file is provided "AS IS"
+ * without any express or implied warranty:
+ * permission to use, copy, modify, and distribute this file
+ * for any purpose is hereby granted without fee, provided that
+ * the above copyright notice and this notice appears in all
+ * copies, and that the name of Transition Networks not be used in
+ * advertising or publicity pertaining to distribution of the
+ * software without specific, written prior permission.
+ * Transition Networks makes no representations about the suitability
+ * of this software for any purpose.
+ *
+ * Derived from c/src/exec/score/cpu/no_cpu/no_cpu.h:
+ *
+ * COPYRIGHT (c) 1989-1998.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ * $Id$
+ */
+/* @(#)mips64orion.h 08/29/96 1.3 */
+
+#ifndef _INCLUDE_MIPS64ORION_h
+#define _INCLUDE_MIPS64ORION_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * This file contains the information required to build
+ * RTEMS for a particular member of the "no cpu"
+ * family when executing in protected mode. It does
+ * this by setting variables to indicate which implementation
+ * dependent features are present in a particular member
+ * of the family.
+ */
+
+#if defined(R4650)
+
+#define CPU_MODEL_NAME "R4650"
+#define MIPS64ORION_HAS_FPU 1
+
+#elif defined(R4600)
+
+#define CPU_MODEL_NAME "R4600"
+#define MIPS64ORION_HAS_FPU 1
+
+#else
+
+#error "Unsupported CPU Model"
+
+#endif
+
+/*
+ * Define the name of the CPU family.
+ */
+
+#define CPU_NAME "MIPS R46xxx"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_MIPS64ORION_h */
+/* end of include file */
diff --git a/c/src/exec/score/cpu/mips64orion/asm.h b/c/src/exec/score/cpu/mips64orion/asm.h
deleted file mode 100644
index 2d322c2339..0000000000
--- a/c/src/exec/score/cpu/mips64orion/asm.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/* asm.h
- *
- * This include file attempts to address the problems
- * caused by incompatible flavors of assemblers and
- * toolsets. It primarily addresses variations in the
- * use of leading underscores on symbols and the requirement
- * that register names be preceded by a %.
- *
- *
- * NOTE: The spacing in the use of these macros
- * is critical to them working as advertised.
- *
- * COPYRIGHT:
- *
- * This file is based on similar code found in newlib available
- * from ftp.cygnus.com. The file which was used had no copyright
- * notice. This file is freely distributable as long as the source
- * of the file is noted. This file is:
- *
- * COPYRIGHT (c) 1994-1997.
- * On-Line Applications Research Corporation (OAR).
- *
- * $Id$
- */
-/* @(#)asm.h 03/15/96 1.1 */
-
-#ifndef __NO_CPU_ASM_h
-#define __NO_CPU_ASM_h
-
-/*
- * Indicate we are in an assembly file and get the basic CPU definitions.
- */
-
-#ifndef ASM
-#define ASM
-#endif
-#include <rtems/score/targopts.h>
-#include <rtems/score/mips64orion.h>
-
-/*
- * Recent versions of GNU cpp define variables which indicate the
- * need for underscores and percents. If not using GNU cpp or
- * the version does not support this, then you will obviously
- * have to define these as appropriate.
- */
-
-#ifndef __USER_LABEL_PREFIX__
-#define __USER_LABEL_PREFIX__ _
-#endif
-
-#ifndef __REGISTER_PREFIX__
-#define __REGISTER_PREFIX__
-#endif
-
-/* ANSI concatenation macros. */
-
-#define CONCAT1(a, b) CONCAT2(a, b)
-#define CONCAT2(a, b) a ## b
-
-/* Use the right prefix for global labels. */
-
-#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
-
-/* Use the right prefix for registers. */
-
-#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
-
-/*
- * define macros for all of the registers on this CPU
- *
- * EXAMPLE: #define d0 REG (d0)
- */
-
-/*
- * Define macros to handle section beginning and ends.
- */
-
-
-#define BEGIN_CODE_DCL .text
-#define END_CODE_DCL
-#define BEGIN_DATA_DCL .data
-#define END_DATA_DCL
-#define BEGIN_CODE .text
-#define END_CODE
-#define BEGIN_DATA
-#define END_DATA
-#define BEGIN_BSS
-#define END_BSS
-#define END
-
-/*
- * Following must be tailor for a particular flavor of the C compiler.
- * They may need to put underscores in front of the symbols.
- */
-
-#define PUBLIC(sym) .globl SYM (sym)
-#define EXTERN(sym) .globl SYM (sym)
-
-#endif
-/* end of include file */
-
-
diff --git a/c/src/exec/score/cpu/mips64orion/cpu_asm.h b/c/src/exec/score/cpu/mips64orion/cpu_asm.h
deleted file mode 100644
index 5d78f39d7c..0000000000
--- a/c/src/exec/score/cpu/mips64orion/cpu_asm.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * cpu_asm.h
- *
- * Author: Craig Lebakken <craigl@transition.com>
- *
- * COPYRIGHT (c) 1996 by Transition Networks Inc.
- *
- * To anyone who acknowledges that this file is provided "AS IS"
- * without any express or implied warranty:
- * permission to use, copy, modify, and distribute this file
- * for any purpose is hereby granted without fee, provided that
- * the above copyright notice and this notice appears in all
- * copies, and that the name of Transition Networks not be used in
- * advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission.
- * Transition Networks makes no representations about the suitability
- * of this software for any purpose.
- *
- * Derived from c/src/exec/score/cpu/no_cpu/cpu_asm.h:
- *
- * COPYRIGHT (c) 1989-1998.
- * On-Line Applications Research Corporation (OAR).
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.OARcorp.com/rtems/license.html.
- *
- * $Id$
- *
- */
-/* @(#)cpu_asm.h 08/20/96 1.2 */
-
-#ifndef __CPU_ASM_h
-#define __CPU_ASM_h
-
-/* pull in the generated offsets */
-
-/* #include <rtems/score/offsets.h> */
-
-/*
- * Hardware General Registers
- */
-
-/* put something here */
-
-/*
- * Hardware Floating Point Registers
- */
-
-#define R_FP0 0
-#define R_FP1 1
-#define R_FP2 2
-#define R_FP3 3
-#define R_FP4 4
-#define R_FP5 5
-#define R_FP6 6
-#define R_FP7 7
-#define R_FP8 8
-#define R_FP9 9
-#define R_FP10 10
-#define R_FP11 11
-#define R_FP12 12
-#define R_FP13 13
-#define R_FP14 14
-#define R_FP15 15
-#define R_FP16 16
-#define R_FP17 17
-#define R_FP18 18
-#define R_FP19 19
-#define R_FP20 20
-#define R_FP21 21
-#define R_FP22 22
-#define R_FP23 23
-#define R_FP24 24
-#define R_FP25 25
-#define R_FP26 26
-#define R_FP27 27
-#define R_FP28 28
-#define R_FP29 29
-#define R_FP30 30
-#define R_FP31 31
-
-/*
- * Hardware Control Registers
- */
-
-/* put something here */
-
-/*
- * Calling Convention
- */
-
-/* put something here */
-
-/*
- * Temporary registers
- */
-
-/* put something here */
-
-/*
- * Floating Point Registers - SW Conventions
- */
-
-/* put something here */
-
-/*
- * Temporary floating point registers
- */
-
-/* put something here */
-
-#endif
-
-/* end of file */
diff --git a/c/src/exec/score/cpu/mips/asm.h b/c/src/exec/score/cpu/mips64orion/rtems/score/asm.h
index 2d322c2339..2d322c2339 100644
--- a/c/src/exec/score/cpu/mips/asm.h
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/mips/cpu_asm.h b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h
index 5d78f39d7c..5d78f39d7c 100644
--- a/c/src/exec/score/cpu/mips/cpu_asm.h
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/cpu_asm.h
diff --git a/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h b/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h
new file mode 100644
index 0000000000..ec89a32a0d
--- /dev/null
+++ b/c/src/exec/score/cpu/mips64orion/rtems/score/mips64orion.h
@@ -0,0 +1,74 @@
+/* mips64orion.h
+ *
+ * Author: Craig Lebakken <craigl@transition.com>
+ *
+ * COPYRIGHT (c) 1996 by Transition Networks Inc.
+ *
+ * To anyone who acknowledges that this file is provided "AS IS"
+ * without any express or implied warranty:
+ * permission to use, copy, modify, and distribute this file
+ * for any purpose is hereby granted without fee, provided that
+ * the above copyright notice and this notice appears in all
+ * copies, and that the name of Transition Networks not be used in
+ * advertising or publicity pertaining to distribution of the
+ * software without specific, written prior permission.
+ * Transition Networks makes no representations about the suitability
+ * of this software for any purpose.
+ *
+ * Derived from c/src/exec/score/cpu/no_cpu/no_cpu.h:
+ *
+ * COPYRIGHT (c) 1989-1998.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.OARcorp.com/rtems/license.html.
+ *
+ * $Id$
+ */
+/* @(#)mips64orion.h 08/29/96 1.3 */
+
+#ifndef _INCLUDE_MIPS64ORION_h
+#define _INCLUDE_MIPS64ORION_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * This file contains the information required to build
+ * RTEMS for a particular member of the "no cpu"
+ * family when executing in protected mode. It does
+ * this by setting variables to indicate which implementation
+ * dependent features are present in a particular member
+ * of the family.
+ */
+
+#if defined(R4650)
+
+#define CPU_MODEL_NAME "R4650"
+#define MIPS64ORION_HAS_FPU 1
+
+#elif defined(R4600)
+
+#define CPU_MODEL_NAME "R4600"
+#define MIPS64ORION_HAS_FPU 1
+
+#else
+
+#error "Unsupported CPU Model"
+
+#endif
+
+/*
+ * Define the name of the CPU family.
+ */
+
+#define CPU_NAME "MIPS R46xxx"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! _INCLUDE_MIPS64ORION_h */
+/* end of include file */
diff --git a/c/src/exec/score/cpu/no_cpu/asm.h b/c/src/exec/score/cpu/no_cpu/rtems/score/asm.h
index 1ca7fd435b..1ca7fd435b 100644
--- a/c/src/exec/score/cpu/no_cpu/asm.h
+++ b/c/src/exec/score/cpu/no_cpu/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/no_cpu/cpu_asm.h b/c/src/exec/score/cpu/no_cpu/rtems/score/cpu_asm.h
index ed58c331bc..ed58c331bc 100644
--- a/c/src/exec/score/cpu/no_cpu/cpu_asm.h
+++ b/c/src/exec/score/cpu/no_cpu/rtems/score/cpu_asm.h
diff --git a/c/src/exec/score/cpu/powerpc/rtems/score/asm.h b/c/src/exec/score/cpu/powerpc/rtems/score/asm.h
new file mode 100644
index 0000000000..af14c95665
--- /dev/null
+++ b/c/src/exec/score/cpu/powerpc/rtems/score/asm.h
@@ -0,0 +1,275 @@
+/* asm.h
+ *
+ * This include file attempts to address the problems
+ * caused by incompatible flavors of assemblers and
+ * toolsets. It primarily addresses variations in the
+ * use of leading underscores on symbols and the requirement
+ * that register names be preceded by a %.
+ *
+ *
+ * NOTE: The spacing in the use of these macros
+ * is critical to them working as advertised.
+ *
+ * COPYRIGHT:
+ *
+ * This file is based on similar code found in newlib available
+ * from ftp.cygnus.com. The file which was used had no copyright
+ * notice. This file is freely distributable as long as the source
+ * of the file is noted. This file is:
+ *
+ * COPYRIGHT (c) 1995.
+ * i-cubed ltd.
+ *
+ * COPYRIGHT (c) 1994.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * $Id$
+ */
+
+#ifndef __PPC_ASM_h
+#define __PPC_ASM_h
+
+/*
+ * Indicate we are in an assembly file and get the basic CPU definitions.
+ */
+
+#ifndef ASM
+#define ASM
+#endif
+#include <rtems/score/targopts.h>
+#include <rtems/score/ppc.h>
+
+/*
+ * Recent versions of GNU cpp define variables which indicate the
+ * need for underscores and percents. If not using GNU cpp or
+ * the version does not support this, then you will obviously
+ * have to define these as appropriate.
+ */
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#ifndef __REGISTER_PREFIX__
+#define __REGISTER_PREFIX__
+#endif
+
+#ifndef __FLOAT_REGISTER_PREFIX__
+#define __FLOAT_REGISTER_PREFIX__ __REGISTER_PREFIX__
+#endif
+
+#if (PPC_ABI == PPC_ABI_POWEROPEN)
+#ifndef __PROC_LABEL_PREFIX__
+#define __PROC_LABEL_PREFIX__ .
+#endif
+#endif
+
+#ifndef __PROC_LABEL_PREFIX__
+#define __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__
+#endif
+
+/* ANSI concatenation macros. */
+
+#define CONCAT1(a, b) CONCAT2(a, b)
+#define CONCAT2(a, b) a ## b
+
+/* Use the right prefix for global labels. */
+
+#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
+
+/* Use the right prefix for procedure labels. */
+
+#define PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x)
+
+/* Use the right prefix for registers. */
+
+#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
+
+/* Use the right prefix for floating point registers. */
+
+#define FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x)
+
+/*
+ * define macros for all of the registers on this CPU
+ *
+ * EXAMPLE: #define d0 REG (d0)
+ */
+#define r0 REG(0)
+#define r1 REG(1)
+#define r2 REG(2)
+#define r3 REG(3)
+#define r4 REG(4)
+#define r5 REG(5)
+#define r6 REG(6)
+#define r7 REG(7)
+#define r8 REG(8)
+#define r9 REG(9)
+#define r10 REG(10)
+#define r11 REG(11)
+#define r12 REG(12)
+#define r13 REG(13)
+#define r14 REG(14)
+#define r15 REG(15)
+#define r16 REG(16)
+#define r17 REG(17)
+#define r18 REG(18)
+#define r19 REG(19)
+#define r20 REG(20)
+#define r21 REG(21)
+#define r22 REG(22)
+#define r23 REG(23)
+#define r24 REG(24)
+#define r25 REG(25)
+#define r26 REG(26)
+#define r27 REG(27)
+#define r28 REG(28)
+#define r29 REG(29)
+#define r30 REG(30)
+#define r31 REG(31)
+#define f0 FREG(0)
+#define f1 FREG(1)
+#define f2 FREG(2)
+#define f3 FREG(3)
+#define f4 FREG(4)
+#define f5 FREG(5)
+#define f6 FREG(6)
+#define f7 FREG(7)
+#define f8 FREG(8)
+#define f9 FREG(9)
+#define f10 FREG(10)
+#define f11 FREG(11)
+#define f12 FREG(12)
+#define f13 FREG(13)
+#define f14 FREG(14)
+#define f15 FREG(15)
+#define f16 FREG(16)
+#define f17 FREG(17)
+#define f18 FREG(18)
+#define f19 FREG(19)
+#define f20 FREG(20)
+#define f21 FREG(21)
+#define f22 FREG(22)
+#define f23 FREG(23)
+#define f24 FREG(24)
+#define f25 FREG(25)
+#define f26 FREG(26)
+#define f27 FREG(27)
+#define f28 FREG(28)
+#define f29 FREG(29)
+#define f30 FREG(30)
+#define f31 FREG(31)
+
+/*
+ * Some special purpose registers (SPRs).
+ */
+#define srr0 0x01a
+#define srr1 0x01b
+#define srr2 0x3de /* IBM 400 series only */
+#define srr3 0x3df /* IBM 400 series only */
+#define sprg0 0x110
+#define sprg1 0x111
+#define sprg2 0x112
+#define sprg3 0x113
+
+
+/* the following SPR/DCR registers exist only in IBM 400 series */
+#define dear 0x3d5
+#define evpr 0x3d6 /* SPR: exception vector prefix register */
+#define iccr 0x3fb /* SPR: instruction cache control reg. */
+#define dccr 0x3fa /* SPR: data cache control reg. */
+
+#define exisr 0x040 /* DCR: external interrupt status register */
+#define exier 0x042 /* DCR: external interrupt enable register */
+#define br0 0x080 /* DCR: memory bank register 0 */
+#define br1 0x081 /* DCR: memory bank register 1 */
+#define br2 0x082 /* DCR: memory bank register 2 */
+#define br3 0x083 /* DCR: memory bank register 3 */
+#define br4 0x084 /* DCR: memory bank register 4 */
+#define br5 0x085 /* DCR: memory bank register 5 */
+#define br6 0x086 /* DCR: memory bank register 6 */
+#define br7 0x087 /* DCR: memory bank register 7 */
+/* end of IBM400 series register definitions */
+
+/* The following registers are for the MPC8x0 */
+#define der 0x095 /* Debug Enable Register */
+/* end of MPC8x0 registers */
+
+/*
+ * Following must be tailor for a particular flavor of the C compiler.
+ * They may need to put underscores in front of the symbols.
+ */
+
+#define PUBLIC_VAR(sym) .globl SYM (sym)
+#define EXTERN_VAR(sym) .extern SYM (sym)
+#define PUBLIC_PROC(sym) .globl PROC (sym)
+#define EXTERN_PROC(sym) .extern PROC (sym)
+
+/* Other potentially assembler specific operations */
+#if PPC_ASM == PPC_ASM_ELF
+#define ALIGN(n,p) .align p
+#define DESCRIPTOR(x) \
+ .section .descriptors,"aw"; \
+ PUBLIC_VAR (x); \
+SYM (x):; \
+ .long PROC (x); \
+ .long s.got; \
+ .long 0
+
+#define EXT_SYM_REF(x) .long x
+#define EXT_PROC_REF(x) .long x
+
+/*
+ * Define macros to handle section beginning and ends.
+ */
+
+#define BEGIN_CODE_DCL .text
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .data
+#define END_DATA_DCL
+#define BEGIN_CODE .text
+#define END_CODE
+#define BEGIN_DATA .data
+#define END_DATA
+#define BEGIN_BSS .bss
+#define END_BSS
+#define END
+
+#elif PPC_ASM == PPC_ASM_XCOFF
+#define ALIGN(n,p) .align p
+#define DESCRIPTOR(x) \
+ .csect x[DS]; \
+ .globl x[DS]; \
+ .long PROC (x)[PR]; \
+ .long TOC[tc0]
+
+#define EXT_SYM_REF(x) .long x[RW]
+#define EXT_PROC_REF(x) .long x[DS]
+
+/*
+ * Define macros to handle section beginning and ends.
+ */
+
+#define BEGIN_CODE_DCL .csect .text[PR]
+#define END_CODE_DCL
+#define BEGIN_DATA_DCL .csect .data[RW]
+#define END_DATA_DCL
+#define BEGIN_CODE .csect .text[PR]
+#define END_CODE
+#define BEGIN_DATA .csect .data[RW]
+#define END_DATA
+#define BEGIN_BSS .bss
+#define END_BSS
+#define END
+
+#else
+#error "PPC_ASM_TYPE is not properly defined"
+#endif
+#ifndef PPC_ASM
+#error "PPC_ASM_TYPE is not properly defined"
+#endif
+
+
+#endif
+/* end of include file */
+
+
diff --git a/c/src/exec/score/cpu/powerpc/mpc860.h b/c/src/exec/score/cpu/powerpc/rtems/score/mpc860.h
index 7daee45bf0..7daee45bf0 100644
--- a/c/src/exec/score/cpu/powerpc/mpc860.h
+++ b/c/src/exec/score/cpu/powerpc/rtems/score/mpc860.h
diff --git a/c/src/exec/score/cpu/sh/asm.h b/c/src/exec/score/cpu/sh/rtems/score/asm.h
index f6fff9f40e..f6fff9f40e 100644
--- a/c/src/exec/score/cpu/sh/asm.h
+++ b/c/src/exec/score/cpu/sh/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/sparc/asm.h b/c/src/exec/score/cpu/sparc/rtems/score/asm.h
index b9a3aabeea..b9a3aabeea 100644
--- a/c/src/exec/score/cpu/sparc/asm.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/asm.h
diff --git a/c/src/exec/score/cpu/sparc/erc32.h b/c/src/exec/score/cpu/sparc/rtems/score/erc32.h
index aa0eef05d9..aa0eef05d9 100644
--- a/c/src/exec/score/cpu/sparc/erc32.h
+++ b/c/src/exec/score/cpu/sparc/rtems/score/erc32.h