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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
commit1800f71707063d8de2458b237e56497b63ab3f73 (patch)
tree8801625f12971a7cf5e05cc8cbd2619986c7a792 /c/src/exec/score/cpu/mips/rtems/score/cpu.h
parent2001-01-08 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-1800f71707063d8de2458b237e56497b63ab3f73.tar.bz2
2001-01-08 Joel Sherrill <joel@OARcorp.com>
* idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
Diffstat (limited to 'c/src/exec/score/cpu/mips/rtems/score/cpu.h')
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/cpu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/c/src/exec/score/cpu/mips/rtems/score/cpu.h b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
index 870d697f6c..c0ed92a642 100644
--- a/c/src/exec/score/cpu/mips/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
@@ -40,7 +40,6 @@ extern "C" {
#include <rtems/score/mips.h> /* pick up machine definitions */
#ifndef ASM
-#include <idtcpu.h>
#include <rtems/score/mipstypes.h>
#endif
@@ -600,7 +599,7 @@ extern unsigned int mips_interrupt_number_of_vectors;
#define _CPU_ISR_Disable( _level ) \
do { \
mips_get_sr( _level ); \
- mips_set_sr( (_level) & ~SR_IEC ); \
+ mips_set_sr( (_level) & ~SR_IMASK ); \
} while(0)
/*