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authorJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2001-01-08 18:16:51 +0000
commit1800f71707063d8de2458b237e56497b63ab3f73 (patch)
tree8801625f12971a7cf5e05cc8cbd2619986c7a792 /c/src/exec/score/cpu/mips
parent2001-01-08 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-1800f71707063d8de2458b237e56497b63ab3f73.tar.bz2
2001-01-08 Joel Sherrill <joel@OARcorp.com>
* idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
Diffstat (limited to 'c/src/exec/score/cpu/mips')
-rw-r--r--c/src/exec/score/cpu/mips/ChangeLog8
-rw-r--r--c/src/exec/score/cpu/mips/idtcpu.h2
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/cpu.h3
-rw-r--r--c/src/exec/score/cpu/mips/rtems/score/mips.h6
4 files changed, 16 insertions, 3 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog
index aa76ef66c0..39322e3962 100644
--- a/c/src/exec/score/cpu/mips/ChangeLog
+++ b/c/src/exec/score/cpu/mips/ChangeLog
@@ -1,3 +1,11 @@
+2001-01-08 Joel Sherrill <joel@OARcorp.com>
+
+ * idtcpu.h: Commented out definition of "wait". It was stupid to
+ use such a common word as a macro.
+ * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
+ * rtems/score/mips.h: Added include of <idtcpu.h>.
+ * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
+
2001-01-03 Joel Sherrill <joel@OARcorp.com>
* rtems/score/cpu.h: Added _CPU_Initialize_vectors().
diff --git a/c/src/exec/score/cpu/mips/idtcpu.h b/c/src/exec/score/cpu/mips/idtcpu.h
index 02153b184f..bbddf23a1d 100644
--- a/c/src/exec/score/cpu/mips/idtcpu.h
+++ b/c/src/exec/score/cpu/mips/idtcpu.h
@@ -176,9 +176,11 @@ LICENSED MATERIAL - PROGRAM PROPERTY OF IDT
#define WAIT .word 0x42000020
#endif WAIT
+/* Disabled by joel -- horrible overload of common word.
#ifndef wait
#define wait .word 0x42000020
#endif wait
+*/
#endif
diff --git a/c/src/exec/score/cpu/mips/rtems/score/cpu.h b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
index 870d697f6c..c0ed92a642 100644
--- a/c/src/exec/score/cpu/mips/rtems/score/cpu.h
+++ b/c/src/exec/score/cpu/mips/rtems/score/cpu.h
@@ -40,7 +40,6 @@ extern "C" {
#include <rtems/score/mips.h> /* pick up machine definitions */
#ifndef ASM
-#include <idtcpu.h>
#include <rtems/score/mipstypes.h>
#endif
@@ -600,7 +599,7 @@ extern unsigned int mips_interrupt_number_of_vectors;
#define _CPU_ISR_Disable( _level ) \
do { \
mips_get_sr( _level ); \
- mips_set_sr( (_level) & ~SR_IEC ); \
+ mips_set_sr( (_level) & ~SR_IMASK ); \
} while(0)
/*
diff --git a/c/src/exec/score/cpu/mips/rtems/score/mips.h b/c/src/exec/score/cpu/mips/rtems/score/mips.h
index 1f2740c49d..f95175d362 100644
--- a/c/src/exec/score/cpu/mips/rtems/score/mips.h
+++ b/c/src/exec/score/cpu/mips/rtems/score/mips.h
@@ -18,6 +18,10 @@
extern "C" {
#endif
+#ifndef ASM
+#include <idtcpu.h>
+#endif
+
/*
* This file contains the information required to build
* RTEMS for a particular member of the "no cpu"
@@ -89,7 +93,7 @@ extern "C" {
do { \
unsigned int _sr; \
mips_get_sr( _sr ); \
- _sr |= (_mask) | SR_IEC; \
+ _sr |= (_mask); \
mips_set_sr( _sr ); \
} while (0)