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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-01 16:21:12 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-03-01 16:21:12 +0000 |
| commit | bd1ecb00d955204b7c01daffe7e6e7cb8c8a765a (patch) | |
| tree | 0a3497019e1d4840c978d664a05107d00ddc69b5 /c/src/exec/score/cpu/mips/ChangeLog | |
| parent | 2001-03-01 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-bd1ecb00d955204b7c01daffe7e6e7cb8c8a765a.tar.bz2 | |
2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov>
* cpu_asm.S: Fixed exception return address, modified FP context
switch so FPU is properly enabled and also doesn't screw up the
exception FP handling.
* idtcpu.h: Added C0_TAR, the MIPS target address register used for
returning from exceptions.
* iregdef.h: Added R_TAR to the stack frame so the target address
can be saved on a per-exception basis. The new entry is past the
end of the frame gdb cares about, so doesn't affect gdb or cpu.h
stuff.
* rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
to obtain FPU defines without systax errors generated by the C
defintions.
* cpu.c: Improved interrupt level saves & restores.
Diffstat (limited to 'c/src/exec/score/cpu/mips/ChangeLog')
| -rw-r--r-- | c/src/exec/score/cpu/mips/ChangeLog | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog index ca93aa0d5c..ef4c51c39f 100644 --- a/c/src/exec/score/cpu/mips/ChangeLog +++ b/c/src/exec/score/cpu/mips/ChangeLog @@ -1,3 +1,19 @@ +2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov> + + * cpu_asm.S: Fixed exception return address, modified FP context + switch so FPU is properly enabled and also doesn't screw up the + exception FP handling. + * idtcpu.h: Added C0_TAR, the MIPS target address register used for + returning from exceptions. + * iregdef.h: Added R_TAR to the stack frame so the target address + can be saved on a per-exception basis. The new entry is past the + end of the frame gdb cares about, so doesn't affect gdb or cpu.h + stuff. + * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it + to obtain FPU defines without systax errors generated by the C + defintions. + * cpu.c: Improved interrupt level saves & restores. + 2002-02-08 Joel Sherrill <joel@OARcorp.com> * iregdef.h, rtems/score/cpu.h: Reordered register in the |