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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-21 10:22:08 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-23 15:18:42 +0200 |
commit | adb85dd473af5c9a72e9da9b7fe013d1b216abc3 (patch) | |
tree | ed54d2ce2354cf2b75995d1e1f2bc685436bc4ca /bsps/sh | |
parent | bsps: Remove AC_CONFIG_SRCDIR() (diff) | |
download | rtems-adb85dd473af5c9a72e9da9b7fe013d1b216abc3.tar.bz2 |
bsps: Move make/custom/* files to bsps
Adjust various build files. Remove automatic generation of the
c/src/lib/libbsp/*/acinclude.m4 files from bootstrap script.
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/sh')
-rw-r--r-- | bsps/sh/gensh1/config/gensh1-testsuite.tcfg | 12 | ||||
-rw-r--r-- | bsps/sh/gensh1/config/gensh1.cfg | 22 | ||||
-rw-r--r-- | bsps/sh/gensh2/config/gensh2-testsuite.tcfg | 12 | ||||
-rw-r--r-- | bsps/sh/gensh2/config/gensh2.cfg | 21 | ||||
-rw-r--r-- | bsps/sh/gensh4/config/gensh4.cfg | 28 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh1-testsuite.tcfg | 15 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh1.cfg | 18 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh2-testsuite.tcfg | 15 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh2.cfg | 18 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh2e-testsuite.tcfg | 14 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh2e.cfg | 17 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh4-testsuite.tcfg | 14 | ||||
-rw-r--r-- | bsps/sh/shsim/config/simsh4.cfg | 17 |
13 files changed, 223 insertions, 0 deletions
diff --git a/bsps/sh/gensh1/config/gensh1-testsuite.tcfg b/bsps/sh/gensh1/config/gensh1-testsuite.tcfg new file mode 100644 index 0000000000..c133712fd0 --- /dev/null +++ b/bsps/sh/gensh1/config/gensh1-testsuite.tcfg @@ -0,0 +1,12 @@ +# +# gensh1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/gensh1/config/gensh1.cfg b/bsps/sh/gensh1/config/gensh1.cfg new file mode 100644 index 0000000000..16b61d222b --- /dev/null +++ b/bsps/sh/gensh1/config/gensh1.cfg @@ -0,0 +1,22 @@ +# +# gensh1.cfg +# +# default configuration for Hitachi sh1 processors +# +# Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -m1 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/gensh2/config/gensh2-testsuite.tcfg b/bsps/sh/gensh2/config/gensh2-testsuite.tcfg new file mode 100644 index 0000000000..c5b0c88fae --- /dev/null +++ b/bsps/sh/gensh2/config/gensh2-testsuite.tcfg @@ -0,0 +1,12 @@ +# +# gensh2 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/gensh2/config/gensh2.cfg b/bsps/sh/gensh2/config/gensh2.cfg new file mode 100644 index 0000000000..49cf0850d2 --- /dev/null +++ b/bsps/sh/gensh2/config/gensh2.cfg @@ -0,0 +1,21 @@ +# +# gensh2.cfg +# +# default configuration for Hitachi sh1 processors +# +# Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/gensh4/config/gensh4.cfg b/bsps/sh/gensh4/config/gensh4.cfg new file mode 100644 index 0000000000..016262f11e --- /dev/null +++ b/bsps/sh/gensh4/config/gensh4.cfg @@ -0,0 +1,28 @@ +# +# gensh4.cfg +# +# default configuration for Hitachi SH7750 board +# +# Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia +# Author: Victor V. Vengerov <vvv@oktet.ru> + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +# Seems to be good without initialisation FPSCR. +# Also works with SH4_FPSCR_DN bit set. +#CPU_CFLAGS = -m4-single-only -mfmovd -ml +#CPU_CFLAGS = -m4-single -ml +# +# It works with SH4_FPSCR_PR bit set +CPU_CFLAGS = -m4 -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh1-testsuite.tcfg b/bsps/sh/shsim/config/simsh1-testsuite.tcfg new file mode 100644 index 0000000000..d567a8d697 --- /dev/null +++ b/bsps/sh/shsim/config/simsh1-testsuite.tcfg @@ -0,0 +1,15 @@ +# +# simsh1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh1.cfg b/bsps/sh/shsim/config/simsh1.cfg new file mode 100644 index 0000000000..0f1da687a8 --- /dev/null +++ b/bsps/sh/shsim/config/simsh1.cfg @@ -0,0 +1,18 @@ +# +# simsh1.cfg +# +# default configuration for gdb-simulation of Hitachi sh1 processors + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m1 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh2-testsuite.tcfg b/bsps/sh/shsim/config/simsh2-testsuite.tcfg new file mode 100644 index 0000000000..8d4f381dfd --- /dev/null +++ b/bsps/sh/shsim/config/simsh2-testsuite.tcfg @@ -0,0 +1,15 @@ +# +# simsh2 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh2.cfg b/bsps/sh/shsim/config/simsh2.cfg new file mode 100644 index 0000000000..cde1fb2fbf --- /dev/null +++ b/bsps/sh/shsim/config/simsh2.cfg @@ -0,0 +1,18 @@ +# +# simsh2.cfg +# +# default configuration for gdb-simulation of Hitachi sh2 processors + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh2e-testsuite.tcfg b/bsps/sh/shsim/config/simsh2e-testsuite.tcfg new file mode 100644 index 0000000000..100b61cc9d --- /dev/null +++ b/bsps/sh/shsim/config/simsh2e-testsuite.tcfg @@ -0,0 +1,14 @@ +# +# The GDB SH Simulator does not have a tick interrupt +# and the simsh2e configuration has limited memory. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh2e.cfg b/bsps/sh/shsim/config/simsh2e.cfg new file mode 100644 index 0000000000..ce34d26d78 --- /dev/null +++ b/bsps/sh/shsim/config/simsh2e.cfg @@ -0,0 +1,17 @@ +# +# Config file for the sh simulator in gdb as SH2E +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2e -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh4-testsuite.tcfg b/bsps/sh/shsim/config/simsh4-testsuite.tcfg new file mode 100644 index 0000000000..0fa2e7744e --- /dev/null +++ b/bsps/sh/shsim/config/simsh4-testsuite.tcfg @@ -0,0 +1,14 @@ +# +# The GDB SH Simulator does not have a tick interrupt +# and the simsh4 configuration has limited memory. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh4.cfg b/bsps/sh/shsim/config/simsh4.cfg new file mode 100644 index 0000000000..c23a8b93b5 --- /dev/null +++ b/bsps/sh/shsim/config/simsh4.cfg @@ -0,0 +1,17 @@ +# +# Config file for the sh simulator in gdb +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m4 -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections |