diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-21 10:22:08 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-23 15:18:42 +0200 |
| commit | adb85dd473af5c9a72e9da9b7fe013d1b216abc3 (patch) | |
| tree | ed54d2ce2354cf2b75995d1e1f2bc685436bc4ca /bsps | |
| parent | bsps: Remove AC_CONFIG_SRCDIR() (diff) | |
| download | rtems-adb85dd473af5c9a72e9da9b7fe013d1b216abc3.tar.bz2 | |
bsps: Move make/custom/* files to bsps
Adjust various build files. Remove automatic generation of the
c/src/lib/libbsp/*/acinclude.m4 files from bootstrap script.
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps')
266 files changed, 3643 insertions, 0 deletions
diff --git a/bsps/arm/altera-cyclone-v/config/altcycv.inc b/bsps/arm/altera-cyclone-v/config/altcycv.inc new file mode 100644 index 0000000000..f3e7f1ae61 --- /dev/null +++ b/bsps/arm/altera-cyclone-v/config/altcycv.inc @@ -0,0 +1,12 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 + +#CFLAGS_OPTIMIZE_V ?= -O0 -g +CFLAGS_OPTIMIZE_V ?= -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/altera-cyclone-v/config/altcycv_devkit.cfg b/bsps/arm/altera-cyclone-v/config/altcycv_devkit.cfg new file mode 100644 index 0000000000..ed54edfedd --- /dev/null +++ b/bsps/arm/altera-cyclone-v/config/altcycv_devkit.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/altcycv.inc diff --git a/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg b/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg new file mode 100644 index 0000000000..ed54edfedd --- /dev/null +++ b/bsps/arm/altera-cyclone-v/config/altcycv_devkit_smp.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/altcycv.inc diff --git a/bsps/arm/atsam/config/atsamv-testsuite.tcfg b/bsps/arm/atsam/config/atsamv-testsuite.tcfg new file mode 100644 index 0000000000..5e2247f20a --- /dev/null +++ b/bsps/arm/atsam/config/atsamv-testsuite.tcfg @@ -0,0 +1,26 @@ +# +# The ATSAMV BSP has too little memory for some tests. +# + +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: jffs2_fserror +exclude: jffs2_fslink +exclude: jffs2_fspatheval +exclude: jffs2_fspermission +exclude: jffs2_fsrdwr +exclude: jffs2_fsscandir01 +exclude: jffs2_fssymlink +exclude: jffs2_fstime +exclude: linpack +exclude: mghttpd01 +exclude: pppd +exclude: psxconfig01 +exclude: sp16 +exclude: sp25 +exclude: sp48 +exclude: spregion_err01 +exclude: spstkalloc02 +exclude: tmfine01 diff --git a/bsps/arm/atsam/config/atsamv.cfg b/bsps/arm/atsam/config/atsamv.cfg new file mode 100644 index 0000000000..0a2437fa12 --- /dev/null +++ b/bsps/arm/atsam/config/atsamv.cfg @@ -0,0 +1,9 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mthumb -mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard + +CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/beagle/config/beagle.inc b/bsps/arm/beagle/config/beagle.inc new file mode 100644 index 0000000000..45d1408ec0 --- /dev/null +++ b/bsps/arm/beagle/config/beagle.inc @@ -0,0 +1,15 @@ +# +# Config file for BeagleBoard. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mcpu=cortex-a8 + +CFLAGS_OPTIMIZE_V ?= -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/beagle/config/beagleboardorig.cfg b/bsps/arm/beagle/config/beagleboardorig.cfg new file mode 100644 index 0000000000..447a51e9f6 --- /dev/null +++ b/bsps/arm/beagle/config/beagleboardorig.cfg @@ -0,0 +1,2 @@ +# Config file for Original BeagleBoard +include $(RTEMS_ROOT)/make/custom/beagle.inc diff --git a/bsps/arm/beagle/config/beagleboardxm.cfg b/bsps/arm/beagle/config/beagleboardxm.cfg new file mode 100644 index 0000000000..ec0d2d2bd8 --- /dev/null +++ b/bsps/arm/beagle/config/beagleboardxm.cfg @@ -0,0 +1,2 @@ +# Config file for BeagleBoard XM +include $(RTEMS_ROOT)/make/custom/beagle.inc diff --git a/bsps/arm/beagle/config/beagleboneblack.cfg b/bsps/arm/beagle/config/beagleboneblack.cfg new file mode 100644 index 0000000000..f947dcef29 --- /dev/null +++ b/bsps/arm/beagle/config/beagleboneblack.cfg @@ -0,0 +1,2 @@ +# Config file for BeagleBone Black +include $(RTEMS_ROOT)/make/custom/beagle.inc diff --git a/bsps/arm/beagle/config/beaglebonewhite.cfg b/bsps/arm/beagle/config/beaglebonewhite.cfg new file mode 100644 index 0000000000..4b035c031e --- /dev/null +++ b/bsps/arm/beagle/config/beaglebonewhite.cfg @@ -0,0 +1,2 @@ +# Config file for Original BeagleBone (aka BeagleBone White) +include $(RTEMS_ROOT)/make/custom/beagle.inc diff --git a/bsps/arm/csb336/config/csb336.cfg b/bsps/arm/csb336/config/csb336.cfg new file mode 100644 index 0000000000..d38e2e10b8 --- /dev/null +++ b/bsps/arm/csb336/config/csb336.cfg @@ -0,0 +1,18 @@ +# +# Config file for Cogent CSB337 - AT91RM9200 SBC +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm920 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/csb337/config/csb337.cfg b/bsps/arm/csb337/config/csb337.cfg new file mode 100644 index 0000000000..97d9685c3d --- /dev/null +++ b/bsps/arm/csb337/config/csb337.cfg @@ -0,0 +1,18 @@ +# +# Config file for Cogent CSB337 - AT91RM9200 SBC +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm920 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/csb337/config/csb637.cfg b/bsps/arm/csb337/config/csb637.cfg new file mode 100644 index 0000000000..3f0832ba8a --- /dev/null +++ b/bsps/arm/csb337/config/csb637.cfg @@ -0,0 +1,5 @@ +# +# Config file for Cogent CSB637 - AT91RM9200 SBC +# + +include $(RTEMS_ROOT)/make/custom/csb337.cfg diff --git a/bsps/arm/csb337/config/kit637_v6.cfg b/bsps/arm/csb337/config/kit637_v6.cfg new file mode 100644 index 0000000000..ac12a62906 --- /dev/null +++ b/bsps/arm/csb337/config/kit637_v6.cfg @@ -0,0 +1,6 @@ +# +# Config file for Cogent KIT637_V6 (CSB637) - AT91RM9200 SBC +# As a KIT637, the package includes a number of peripherals +# not normally on a CSB637. + +include $(RTEMS_ROOT)/make/custom/csb337.cfg diff --git a/bsps/arm/edb7312/config/edb7312.cfg b/bsps/arm/edb7312/config/edb7312.cfg new file mode 100644 index 0000000000..32dd537872 --- /dev/null +++ b/bsps/arm/edb7312/config/edb7312.cfg @@ -0,0 +1,19 @@ +# +# Config file for Cirrus/Cogent EDB7312 eval board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=arm7tdmi + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136jfs-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm1136jfs.cfg b/bsps/arm/gdbarmsim/config/arm1136jfs.cfg new file mode 100644 index 0000000000..be4d5a6484 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136jfs.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm1136jf-s (FPU) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm1136jf-s + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136js-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm1136js.cfg b/bsps/arm/gdbarmsim/config/arm1136js.cfg new file mode 100644 index 0000000000..83308c39b0 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm1136js.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm1136j-s (no FPU) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm1136j-s + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm7tdmi-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm7tdmi.cfg b/bsps/arm/gdbarmsim/config/arm7tdmi.cfg new file mode 100644 index 0000000000..e992733864 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm7tdmi.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm7tdmi +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm7tdmi + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg b/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm920-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/arm920.cfg b/bsps/arm/gdbarmsim/config/arm920.cfg new file mode 100644 index 0000000000..b246d5bb20 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/arm920.cfg @@ -0,0 +1,18 @@ +# +# Config file for GDB ARM Simulator as arm920 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm920 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg b/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg new file mode 100644 index 0000000000..70a1a311a8 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/armcortexa9-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The GDB ARM Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/arm/gdbarmsim/config/armcortexa9.cfg b/bsps/arm/gdbarmsim/config/armcortexa9.cfg new file mode 100644 index 0000000000..6eecf70615 --- /dev/null +++ b/bsps/arm/gdbarmsim/config/armcortexa9.cfg @@ -0,0 +1,19 @@ +# +# Config file for GDB ARM Simulator as cortex-a9 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# CPU_CFLAGS = -mcpu=arm920 -mstructure-size-boundary=8 +CPU_CFLAGS = -mcpu=cortex-a9 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/gumstix/config/gumstix.cfg b/bsps/arm/gumstix/config/gumstix.cfg new file mode 100644 index 0000000000..664e42b365 --- /dev/null +++ b/bsps/arm/gumstix/config/gumstix.cfg @@ -0,0 +1,18 @@ +# +# Config file for Gumstix (http://www.gumstix.com) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=xscale + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/imx/config/imx7.cfg b/bsps/arm/imx/config/imx7.cfg new file mode 100644 index 0000000000..059f54937b --- /dev/null +++ b/bsps/arm/imx/config/imx7.cfg @@ -0,0 +1,16 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a7 + +LDFLAGS = -Wl,--gc-sections + +CFLAGS_OPTIMIZE_V ?= -O2 -g -ffunction-sections -fdata-sections + +# define bsp-post-link +# $(OBJCOPY) -O binary '$@' '$(basename $@).bin' +# gzip -f -9 '$(basename $@).bin' +# mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img' +# $(default-bsp-post-link) +# endef diff --git a/bsps/arm/lm3s69xx/config/lm3s3749-testsuite.tcfg b/bsps/arm/lm3s69xx/config/lm3s3749-testsuite.tcfg new file mode 100644 index 0000000000..cdff2a9536 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s3749-testsuite.tcfg @@ -0,0 +1,38 @@ +# +# lm3s3749 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg +include: testdata/disable-mrfs-tests.tcfg + +exclude: capture +exclude: cdtest +exclude: iostream +exclude: dl01 +exclude: dl02 +exclude: dl04 +exclude: dl05 +exclude: dl06 +exclude: ftp01 +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: fsdosfsformat01 +exclude: fsrfsbitmap01 +exclude: linpack +exclude: loopback +exclude: mghttpd01 +exclude: mdosfs_fserror +exclude: mdosfs_fsrdwr +exclude: monitor02 +exclude: paranoia +exclude: pppd +exclude: rtems++ +exclude: shell01 +exclude: spstkalloc02 +exclude: sptls02 +exclude: syscall01 +exclude: utf8proc01 diff --git a/bsps/arm/lm3s69xx/config/lm3s3749.cfg b/bsps/arm/lm3s69xx/config/lm3s3749.cfg new file mode 100644 index 0000000000..c9edf2baf6 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s3749.cfg @@ -0,0 +1,5 @@ +# +# Config file for LM3S3749. +# + +include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc diff --git a/bsps/arm/lm3s69xx/config/lm3s6965-testsuite.tcfg b/bsps/arm/lm3s69xx/config/lm3s6965-testsuite.tcfg new file mode 100644 index 0000000000..2f36e2ec11 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s6965-testsuite.tcfg @@ -0,0 +1,21 @@ +# +# lm3s6965 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fileio +exclude: iostream +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: linpack +exclude: mghttpd01 +exclude: monitor02 +exclude: utf8proc01 +exclude: pppd +exclude: rtems++ +exclude: spstkalloc02 diff --git a/bsps/arm/lm3s69xx/config/lm3s6965.cfg b/bsps/arm/lm3s69xx/config/lm3s6965.cfg new file mode 100644 index 0000000000..cba7930d04 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s6965.cfg @@ -0,0 +1,5 @@ +# +# Config file for LM3S6965. +# + +include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc diff --git a/bsps/arm/lm3s69xx/config/lm3s6965_qemu.cfg b/bsps/arm/lm3s69xx/config/lm3s6965_qemu.cfg new file mode 100644 index 0000000000..0ef2615af6 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s6965_qemu.cfg @@ -0,0 +1,5 @@ +# +# Config file for QEMU LM3S6965 emulation. +# + +include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc diff --git a/bsps/arm/lm3s69xx/config/lm3s69xx.inc b/bsps/arm/lm3s69xx/config/lm3s69xx.inc new file mode 100644 index 0000000000..954a43c1bb --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm3s69xx.inc @@ -0,0 +1,20 @@ +# +# Config file for LM3S69XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-m -mthumb + +CFLAGS_OPTIMIZE_V = -O2 -g + +# Add CFLAGS and LDFLAGS for compiling and linking with per item sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/arm/lm3s69xx/config/lm4f120-testsuite.tcfg b/bsps/arm/lm3s69xx/config/lm4f120-testsuite.tcfg new file mode 100644 index 0000000000..8eafa26328 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm4f120-testsuite.tcfg @@ -0,0 +1,27 @@ +# +# lm4f120 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fileio +exclude: cdtest +exclude: iostream +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: linpack +exclude: mghttpd01 +exclude: monitor02 +exclude: pppd +exclude: sp16 +exclude: sp25 +exclude: sp48 +exclude: spstkalloc02 +exclude: sptls02 +exclude: rtems++ +exclude: tmfine01 +exclude: utf8proc01 diff --git a/bsps/arm/lm3s69xx/config/lm4f120.cfg b/bsps/arm/lm3s69xx/config/lm4f120.cfg new file mode 100644 index 0000000000..aa7961e6c7 --- /dev/null +++ b/bsps/arm/lm3s69xx/config/lm4f120.cfg @@ -0,0 +1,5 @@ +# +# Config file for LM4F120XL. +# + +include $(RTEMS_ROOT)/make/custom/lm3s69xx.inc diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed-testsuite.tcfg b/bsps/arm/lpc176x/config/lpc1768_mbed-testsuite.tcfg new file mode 100644 index 0000000000..1abc639cdc --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed-testsuite.tcfg @@ -0,0 +1,20 @@ +# +# lpc1768 mbed RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: flashdisk01 +exclude: ftp01 +exclude: utf8proc01 +exclude: spstkalloc02 +exclude: fsdosfsname01 +exclude: linpack +exclude: pppd +exclude: mghttpd01 +exclude: tmfine01 +exclude: iostream +exclude: rtems++ diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed.cfg b/bsps/arm/lpc176x/config/lpc1768_mbed.cfg new file mode 100644 index 0000000000..3e9255e88f --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed.cfg @@ -0,0 +1,22 @@ +# +# Config file for mbed LPC1768 board. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-m -mthumb + +CFLAGS_OPTIMIZE_V = -O2 -ggdb3 +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections + +BINEXT?=.bin +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(BINEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram-testsuite.tcfg b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram-testsuite.tcfg new file mode 100644 index 0000000000..8b423a1f04 --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram-testsuite.tcfg @@ -0,0 +1,21 @@ +# +# lpc1768_mbed_ahb_ram RTEMS Test Database +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: linpack +exclude: mghttpd01 +exclude: pppd +exclude: spstkalloc02 +exclude: sptls02 +exclude: tmfine01 +exclude: utf8proc01 +exclude: iostream +exclude: rtems++ diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram.cfg b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram.cfg new file mode 100644 index 0000000000..e187d1ff30 --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for mbed LPC1768 board. +# + +include $(RTEMS_ROOT)/make/custom/lpc1768_mbed.cfg diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth-testsuite.tcfg b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth-testsuite.tcfg new file mode 100644 index 0000000000..ed465c10f6 --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth-testsuite.tcfg @@ -0,0 +1,32 @@ +# +# lpc1768_mbed_ahb_ram_eth RTEMS Test Database +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fileio +exclude: ftp01 +exclude: cdtest +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: linpack +exclude: mghttpd01 +exclude: monitor01 +exclude: monitor02 +exclude: pppd +exclude: psxconfig01 +exclude: rbheap01 +exclude: sp16 +exclude: sp25 +exclude: sp48 +exclude: spregion_err01 +exclude: spstkalloc +exclude: spstkalloc02 +exclude: sptls02 +exclude: tmfine01 +exclude: utf8proc01 +exclude: iostream +exclude: rtems++ diff --git a/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth.cfg b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth.cfg new file mode 100644 index 0000000000..e187d1ff30 --- /dev/null +++ b/bsps/arm/lpc176x/config/lpc1768_mbed_ahb_ram_eth.cfg @@ -0,0 +1,5 @@ +# +# Config file for mbed LPC1768 board. +# + +include $(RTEMS_ROOT)/make/custom/lpc1768_mbed.cfg diff --git a/bsps/arm/lpc24xx/config/lpc17xx.inc b/bsps/arm/lpc24xx/config/lpc17xx.inc new file mode 100644 index 0000000000..e877959e1d --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx.inc @@ -0,0 +1,15 @@ +# +# Config file for LPC17XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-m -mthumb + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + diff --git a/bsps/arm/lpc24xx/config/lpc17xx_ea_ram.cfg b/bsps/arm/lpc24xx/config/lpc17xx_ea_ram.cfg new file mode 100644 index 0000000000..caaaf07639 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_ea_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC1788 OEM Board from Embedded Artists. +# + +include $(RTEMS_ROOT)/make/custom/lpc17xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int-testsuite.tcfg new file mode 100644 index 0000000000..64e3a0585d --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# lpc17xx_ea_rom_int RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 diff --git a/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int.cfg b/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int.cfg new file mode 100644 index 0000000000..caaaf07639 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_ea_rom_int.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC1788 OEM Board from Embedded Artists. +# + +include $(RTEMS_ROOT)/make/custom/lpc17xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc17xx_plx800_ram.cfg b/bsps/arm/lpc24xx/config/lpc17xx_plx800_ram.cfg new file mode 100644 index 0000000000..a3cf1f0816 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_plx800_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC17XX (PLX800). +# + +include $(RTEMS_ROOT)/make/custom/lpc17xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int-testsuite.tcfg new file mode 100644 index 0000000000..9c7f2ce60b --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# lpc17xx_plx800_rom_int RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 diff --git a/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int.cfg b/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int.cfg new file mode 100644 index 0000000000..a3cf1f0816 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc17xx_plx800_rom_int.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC17XX (PLX800). +# + +include $(RTEMS_ROOT)/make/custom/lpc17xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc2362-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc2362-testsuite.tcfg new file mode 100644 index 0000000000..bf8df07b8b --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc2362-testsuite.tcfg @@ -0,0 +1,41 @@ +# +# lpc2362 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg +include: testdata/disable-mrfs-tests.tcfg + +exclude: capture +exclude: cdtest +exclude: dl01 +exclude: dl02 +exclude: dl04 +exclude: dl05 +exclude: dl06 +exclude: fileio +exclude: flashdisk01 +exclude: fsrofs01 +exclude: fsdosfsname01 +exclude: fsdosfsformat01 +exclude: fsrfsbitmap01 +exclude: ftp01 +exclude: iostream +exclude: linpack +exclude: loopback +exclude: math +exclude: mdosfs_fserror +exclude: mghttpd01 +exclude: monitor02 +exclude: mdosfs_fsrdwr +exclude: paranoia +exclude: pppd +exclude: rtems++ +exclude: shell01 +exclude: spstkalloc02 +exclude: sptls02 +exclude: syscall01 +exclude: tmfine01 +exclude: utf8proc01 diff --git a/bsps/arm/lpc24xx/config/lpc2362.cfg b/bsps/arm/lpc24xx/config/lpc2362.cfg new file mode 100644 index 0000000000..d5fc413191 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc2362.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC2362. +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc23xx_tli800-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc23xx_tli800-testsuite.tcfg new file mode 100644 index 0000000000..768e8ee7d7 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc23xx_tli800-testsuite.tcfg @@ -0,0 +1,52 @@ +# +# lpc23xx_tli800 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg +include: testdata/disable-mrfs-tests.tcfg + +exclude: capture +exclude: cdtest +exclude: complex +exclude: crypt01 +exclude: dl01 +exclude: dl02 +exclude: dl04 +exclude: dl05 +exclude: dl06 +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsformat01 +exclude: fsdosfsname01 +exclude: fsdosfswrite01 +exclude: fsrfsbitmap01 +exclude: fsrofs01 +exclude: ftp01 +exclude: iostream +exclude: linpack +exclude: loopback +exclude: math +exclude: mathf +exclude: mdosfs_fserror +exclude: mdosfs_fsscandir01 +exclude: mghttpd01 +exclude: monitor +exclude: monitor02 +exclude: mdosfs_fsrdwr +exclude: mdosfs_fspatheval +exclude: mdosfs_fstime +exclude: paranoia +exclude: pppd +exclude: psxmsgq01 +exclude: rtems++ +exclude: shell01 +exclude: sptls02 +exclude: spstkalloc02 +exclude: syscall01 +exclude: tar01 +exclude: termios +exclude: tmfine01 +exclude: utf8proc01 diff --git a/bsps/arm/lpc24xx/config/lpc23xx_tli800.cfg b/bsps/arm/lpc24xx/config/lpc23xx_tli800.cfg new file mode 100644 index 0000000000..a7e7ef34b8 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc23xx_tli800.cfg @@ -0,0 +1,5 @@ +# +# Config file for TLI800. +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc24xx.inc b/bsps/arm/lpc24xx/config/lpc24xx.inc new file mode 100644 index 0000000000..9bcef4b793 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx.inc @@ -0,0 +1,14 @@ +# +# Config file for LPC24XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mcpu=arm7tdmi-s -mthumb + +CFLAGS_OPTIMIZE_V = -Os -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/lpc24xx/config/lpc24xx_ea.cfg b/bsps/arm/lpc24xx/config/lpc24xx_ea.cfg new file mode 100644 index 0000000000..813fcb8cb6 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_ea.cfg @@ -0,0 +1,12 @@ +# +# Config file for LPC24XX (QVGA Base Board from Embedded Artists). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc + +# define bsp-post-link +# $(OBJCOPY) -O binary '$@' '$(basename $@).bin' +# gzip -f -9 '$(basename $@).bin' +# mkimage -A arm -O rtems -T kernel -C gzip -a a0000000 -e a0000040 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img' +# $(default-bsp-post-link) +# endef diff --git a/bsps/arm/lpc24xx/config/lpc24xx_ncs_ram.cfg b/bsps/arm/lpc24xx/config/lpc24xx_ncs_ram.cfg new file mode 100644 index 0000000000..a629a4f497 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_ncs_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC24XX (NCS). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_ext.cfg b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_ext.cfg new file mode 100644 index 0000000000..a629a4f497 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_ext.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC24XX (NCS). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int-testsuite.tcfg new file mode 100644 index 0000000000..cec9333713 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# lpc24xx_ncs_rom_int RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 diff --git a/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int.cfg b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int.cfg new file mode 100644 index 0000000000..a629a4f497 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_ncs_rom_int.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC24XX (NCS). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc24xx_plx800_ram.cfg b/bsps/arm/lpc24xx/config/lpc24xx_plx800_ram.cfg new file mode 100644 index 0000000000..6e25ad5dc2 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_plx800_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC24XX (PLX800). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int-testsuite.tcfg new file mode 100644 index 0000000000..94b7f7a947 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# lpc24xx_plx800_rom_int RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 diff --git a/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int.cfg b/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int.cfg new file mode 100644 index 0000000000..6e25ad5dc2 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc24xx_plx800_rom_int.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC24XX (PLX800). +# + +include $(RTEMS_ROOT)/make/custom/lpc24xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc40xx.inc b/bsps/arm/lpc24xx/config/lpc40xx.inc new file mode 100644 index 0000000000..5460a95f54 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc40xx.inc @@ -0,0 +1,14 @@ +# +# Config file for LPC40XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mthumb -march=armv7-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mtune=cortex-m4 + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/lpc24xx/config/lpc40xx_ea_ram.cfg b/bsps/arm/lpc24xx/config/lpc40xx_ea_ram.cfg new file mode 100644 index 0000000000..4c4eb4d360 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc40xx_ea_ram.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC40XX OEM Board from Embedded Artists. +# + +include $(RTEMS_ROOT)/make/custom/lpc40xx.inc diff --git a/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int-testsuite.tcfg b/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int-testsuite.tcfg new file mode 100644 index 0000000000..3a968c4a74 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# lpc40xx_ea_rom_int RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 diff --git a/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int.cfg b/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int.cfg new file mode 100644 index 0000000000..4c4eb4d360 --- /dev/null +++ b/bsps/arm/lpc24xx/config/lpc40xx_ea_rom_int.cfg @@ -0,0 +1,5 @@ +# +# Config file for LPC40XX OEM Board from Embedded Artists. +# + +include $(RTEMS_ROOT)/make/custom/lpc40xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx.inc b/bsps/arm/lpc32xx/config/lpc32xx.inc new file mode 100644 index 0000000000..f184741242 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx.inc @@ -0,0 +1,14 @@ +# +# Config file for LPC32XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mcpu=arm926ej-s -mthumb + +CFLAGS_OPTIMIZE_V ?= -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg new file mode 100644 index 0000000000..343fddef67 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg @@ -0,0 +1,5 @@ +# +# Config file for MZX application. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg new file mode 100644 index 0000000000..225ee5dc49 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg @@ -0,0 +1,20 @@ +# +# lpc32xx_mzx_stage_1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: dl05 +exclude: fileio +exclude: ftp01 +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: mghttpd01 +exclude: monitor02 +exclude: pppd +exclude: rtems++ +exclude: utf8proc01 diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg new file mode 100644 index 0000000000..b3838ab904 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg @@ -0,0 +1,7 @@ +# +# Config file for MZX stage-1 program. +# + +CFLAGS_OPTIMIZE_V = -Os -g + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg new file mode 100644 index 0000000000..586ddbec9c --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg @@ -0,0 +1,5 @@ +# +# Config file for MZX stage-2 program. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg b/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg new file mode 100644 index 0000000000..5c5c56734e --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg @@ -0,0 +1,5 @@ +# +# Config file for Phycore LPC3250 board. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/raspberrypi/config/raspberrypi.cfg b/bsps/arm/raspberrypi/config/raspberrypi.cfg new file mode 100644 index 0000000000..759b79d8f6 --- /dev/null +++ b/bsps/arm/raspberrypi/config/raspberrypi.cfg @@ -0,0 +1,7 @@ +# +# Config file for RASPBERRYPI +# +include $(RTEMS_ROOT)/make/custom/raspberrypi.inc + +CPU_CFLAGS = -mcpu=arm1176jzf-s + diff --git a/bsps/arm/raspberrypi/config/raspberrypi.inc b/bsps/arm/raspberrypi/config/raspberrypi.inc new file mode 100644 index 0000000000..a8b6f264c3 --- /dev/null +++ b/bsps/arm/raspberrypi/config/raspberrypi.inc @@ -0,0 +1,20 @@ +# +# Config file for Raspberry Pi variants. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CFLAGS_OPTIMIZE_V ?= -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/arm/raspberrypi/config/raspberrypi2.cfg b/bsps/arm/raspberrypi/config/raspberrypi2.cfg new file mode 100644 index 0000000000..a233d3461d --- /dev/null +++ b/bsps/arm/raspberrypi/config/raspberrypi2.cfg @@ -0,0 +1,6 @@ +# +# Config file for RASPBERRYPI 2 +# +include $(RTEMS_ROOT)/make/custom/raspberrypi.inc + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a7 diff --git a/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu.cfg b/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu.cfg new file mode 100644 index 0000000000..f6875451cd --- /dev/null +++ b/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu.cfg @@ -0,0 +1,9 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 + +LDFLAGS = -Wl,--gc-sections + +CFLAGS_OPTIMIZE_V ?= -O0 -g -ffunction-sections -fdata-sections diff --git a/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg b/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg new file mode 100644 index 0000000000..fd51a18004 --- /dev/null +++ b/bsps/arm/realview-pbx-a9/config/realview_pbx_a9_qemu_smp.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/realview_pbx_a9_qemu.cfg diff --git a/bsps/arm/rtl22xx/config/rtl22xx-testsuite.tcfg b/bsps/arm/rtl22xx/config/rtl22xx-testsuite.tcfg new file mode 100644 index 0000000000..6c25615e73 --- /dev/null +++ b/bsps/arm/rtl22xx/config/rtl22xx-testsuite.tcfg @@ -0,0 +1,13 @@ +# +# rtl22xx RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: fsdosfsname01 +exclude: linpack +exclude: iostream +exclude: rtems++ +exclude: utf8proc01 diff --git a/bsps/arm/rtl22xx/config/rtl22xx.cfg b/bsps/arm/rtl22xx/config/rtl22xx.cfg new file mode 100644 index 0000000000..9b195477f8 --- /dev/null +++ b/bsps/arm/rtl22xx/config/rtl22xx.cfg @@ -0,0 +1,21 @@ +# +# Config file for LPC22xx board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=arm7tdmi + +# optimize flag: typically -0, could use -O4 or -fast +# -O4 is ok for RTEMS +# NOTE2: some level of -O may be actually required by inline assembler (at least +# -O2 so far. +CFLAGS_OPTIMIZE_V = -Os -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/rtl22xx/config/rtl22xx_t-testsuite.tcfg b/bsps/arm/rtl22xx/config/rtl22xx_t-testsuite.tcfg new file mode 100644 index 0000000000..e55524aac4 --- /dev/null +++ b/bsps/arm/rtl22xx/config/rtl22xx_t-testsuite.tcfg @@ -0,0 +1,9 @@ +# +# rtl22xx_t RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/arm/rtl22xx/config/rtl22xx_t.cfg b/bsps/arm/rtl22xx/config/rtl22xx_t.cfg new file mode 100644 index 0000000000..5cf8b66246 --- /dev/null +++ b/bsps/arm/rtl22xx/config/rtl22xx_t.cfg @@ -0,0 +1,19 @@ +# +# Config file for LPC22xx board in Thumb mode +# + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# + +include $(RTEMS_ROOT)/make/custom/rtl22xx.cfg + +CPU_CFLAGS += -mthumb + +#CFLAG: -mthumb-interwork can add veneer between ARM and Thumb code. +#CPU_CFLAGS += -mthumb-interwork -D __THUMB_INTERWORK__ -mthumb +#CPU_ASFLAGS += -D __THUMB_INTERWORK__ -mthumb-interwork + +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/smdk2410/config/smdk2410.cfg b/bsps/arm/smdk2410/config/smdk2410.cfg new file mode 100644 index 0000000000..b5720cae3f --- /dev/null +++ b/bsps/arm/smdk2410/config/smdk2410.cfg @@ -0,0 +1,17 @@ +# +# Config file for ARM smdk2410 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=arm + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=arm920t -DCPU_S3C2410 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/stm32f4/config/stm32f105rc-testsuite.tcfg b/bsps/arm/stm32f4/config/stm32f105rc-testsuite.tcfg new file mode 100644 index 0000000000..ad44d38d81 --- /dev/null +++ b/bsps/arm/stm32f4/config/stm32f105rc-testsuite.tcfg @@ -0,0 +1,21 @@ +# +# stm32f105rc RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: iostream +exclude: linpack +exclude: mghttpd01 +exclude: monitor02 +exclude: pppd +exclude: rtems++ +exclude: spstkalloc02 +exclude: utf8proc01 diff --git a/bsps/arm/stm32f4/config/stm32f105rc.cfg b/bsps/arm/stm32f4/config/stm32f105rc.cfg new file mode 100644 index 0000000000..b0a522e08f --- /dev/null +++ b/bsps/arm/stm32f4/config/stm32f105rc.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/stm32f4.cfg diff --git a/bsps/arm/stm32f4/config/stm32f4-testsuite.tcfg b/bsps/arm/stm32f4/config/stm32f4-testsuite.tcfg new file mode 100644 index 0000000000..e3a3775ed3 --- /dev/null +++ b/bsps/arm/stm32f4/config/stm32f4-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# stm32f4 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/arm/stm32f4/config/stm32f4.cfg b/bsps/arm/stm32f4/config/stm32f4.cfg new file mode 100644 index 0000000000..edca4bfa32 --- /dev/null +++ b/bsps/arm/stm32f4/config/stm32f4.cfg @@ -0,0 +1,10 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-m -mthumb + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/tms570/config/tms570ls3137.inc b/bsps/arm/tms570/config/tms570ls3137.inc new file mode 100644 index 0000000000..76d5ccd2ba --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137.inc @@ -0,0 +1,25 @@ +# +# Config file for TMS570LS3137 board. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-r -mthumb -mbig-endian +CPU_CFLAGS += -mfpu=vfpv3-d16 -mfloat-abi=hard + +CFLAGS_OPTIMIZE_V = -O2 -ggdb +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +BINEXT?=.bin + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(BINEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk-testsuite.tcfg b/bsps/arm/tms570/config/tms570ls3137_hdk-testsuite.tcfg new file mode 100644 index 0000000000..cac977c83a --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# tms570ls3137 mbed RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +exclude: linpack diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk.cfg b/bsps/arm/tms570/config/tms570ls3137_hdk.cfg new file mode 100644 index 0000000000..d769895360 --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk.cfg @@ -0,0 +1,5 @@ +# +# Config file for TMS570LS3137 board. +# + +include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_intram-testsuite.tcfg b/bsps/arm/tms570/config/tms570ls3137_hdk_intram-testsuite.tcfg new file mode 100644 index 0000000000..c13e1597e0 --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk_intram-testsuite.tcfg @@ -0,0 +1,26 @@ +# +# tms570ls3137 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: iostream +exclude: pppd +exclude: loopback +exclude: syscall01 +exclude: utf8proc01 +exclude: monitor02 +exclude: mghttpd01 +exclude: ftp01 +exclude: fsdosfsname01 +exclude: jffs2_fserror +exclude: jffs2_fslink +exclude: jffs2_fspatheval +exclude: jffs2_fspermission +exclude: jffs2_fsrdwr +exclude: jffs2_fsscandir01 +exclude: jffs2_fssymlink +exclude: jffs2_fstime +exclude: linpack diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_intram.cfg b/bsps/arm/tms570/config/tms570ls3137_hdk_intram.cfg new file mode 100644 index 0000000000..d769895360 --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk_intram.cfg @@ -0,0 +1,5 @@ +# +# Config file for TMS570LS3137 board. +# + +include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_sdram.cfg b/bsps/arm/tms570/config/tms570ls3137_hdk_sdram.cfg new file mode 100644 index 0000000000..d769895360 --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk_sdram.cfg @@ -0,0 +1,5 @@ +# +# Config file for TMS570LS3137 board. +# + +include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg b/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg new file mode 100644 index 0000000000..8286e36b4a --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# tms570ls3137_hdk_with_loader RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +exclude: linpack diff --git a/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader.cfg b/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader.cfg new file mode 100644 index 0000000000..d769895360 --- /dev/null +++ b/bsps/arm/tms570/config/tms570ls3137_hdk_with_loader.cfg @@ -0,0 +1,5 @@ +# +# Config file for TMS570LS3137 board. +# + +include $(RTEMS_ROOT)/make/custom/tms570ls3137.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq.inc b/bsps/arm/xilinx-zynq/config/xilinx_zynq.inc new file mode 100644 index 0000000000..59c18f7c95 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq.inc @@ -0,0 +1,10 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 + +CFLAGS_OPTIMIZE_V ?= -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_a9_qemu.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_a9_qemu.cfg new file mode 100644 index 0000000000..013ae6f485 --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_a9_qemu.cfg @@ -0,0 +1,10 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard -mtune=cortex-a9 + +CFLAGS_OPTIMIZE_V ?= -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc702.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc702.cfg new file mode 100644 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc702.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc706.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc706.cfg new file mode 100644 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zc706.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/arm/xilinx-zynq/config/xilinx_zynq_zedboard.cfg b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zedboard.cfg new file mode 100644 index 0000000000..2de871d46e --- /dev/null +++ b/bsps/arm/xilinx-zynq/config/xilinx_zynq_zedboard.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/xilinx_zynq.inc diff --git a/bsps/bfin/TLL6527M/config/TLL6527M.cfg b/bsps/bfin/TLL6527M/config/TLL6527M.cfg new file mode 100644 index 0000000000..8226543b89 --- /dev/null +++ b/bsps/bfin/TLL6527M/config/TLL6527M.cfg @@ -0,0 +1,19 @@ +# +# Config file for Blackfin TLL6527M +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=bfin + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS =-mcpu=bf527 + +# optimize flag: typically -O2 +# gcc-4.2.0 segfaults on -OX > -O0 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/bfin/bf537Stamp/config/bf537Stamp.cfg b/bsps/bfin/bf537Stamp/config/bf537Stamp.cfg new file mode 100644 index 0000000000..e27a7d31a1 --- /dev/null +++ b/bsps/bfin/bf537Stamp/config/bf537Stamp.cfg @@ -0,0 +1,18 @@ +# +# Config file for Blackfin bf537Stamp +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=bfin + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = + +# optimize flag: typically -O2 +# gcc-4.2.0 segfaults on -OX > -O0 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/bfin/eZKit533/config/eZKit533.cfg b/bsps/bfin/eZKit533/config/eZKit533.cfg new file mode 100644 index 0000000000..834039d985 --- /dev/null +++ b/bsps/bfin/eZKit533/config/eZKit533.cfg @@ -0,0 +1,18 @@ +# +# Config file for Blackfin eZKit533 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=bfin + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg b/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg new file mode 100644 index 0000000000..1fef6085d1 --- /dev/null +++ b/bsps/epiphany/epiphany_sim/config/epiphany_sim.cfg @@ -0,0 +1,10 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = epiphany + +CPU_CFLAGS = + +CFLAGS_OPTIMIZE_V ?= -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/i386/pc386/config/pc386.cfg b/bsps/i386/pc386/config/pc386.cfg new file mode 100644 index 0000000000..dd7f554cbc --- /dev/null +++ b/bsps/i386/pc386/config/pc386.cfg @@ -0,0 +1,58 @@ +# +# Config file for the PC 386 BSP +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=i386 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +# NOTE: CPU_CFLAGS is set by pc386 variants. +ifeq ($(CPU_CFLAGS),) + CPU_CFLAGS = -mtune=i386 +endif + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +# Per function sections disabled per https://devel.rtems.org/ticket/2638 +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# Here is the rule to actually build a $(ARCH)/foo$(EXEEXT) +# It also builds $(ARCH)/foo.sr and $(ARCH)/foo.nm +# Usage ref: src/tests/sptest/sp1/Makefile + +#+--------------------------------------------------------------------------+ +#| Set the value of RELOCADDR to the address where you want your image to +#| load. If you'll be using GRUB to load the images it will have to be >= +#| 0x100000 (1024K). If you are using NetBoot to load the images it can be +#| >= 0x10000 (64K) AND <= 0x97C00 (607K) OR >= 0x100000 (1024K). The memory +#| top is of course another limit. Make sure there is enough space before the +#| upper memory limits for the image and the memory allocated by it to fit. +#| Make sure the value you choose is aligned to 4 bytes. +#+--------------------------------------------------------------------------+ + RELOCADDR=0x00100000 + +START16FILE=$(PROJECT_RELEASE)/lib/start16$(LIB_VARIANT).bin +START16ADDR=0x00097C00 +HEADERADDR=0x00097E00 + +LDFLAGS += -Wl,-Ttext,$(RELOCADDR) + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O elf32-i386 \ + --remove-section=.comment \ + --remove-section=.note \ + --strip-unneeded $(basename $@)$(EXEEXT) $(basename $@).nxe + $(OBJCOPY) -O binary $(basename $@).nxe $(basename $@).bin + $(PROJECT_TOOLS)/bin2boot -v $(basename $@)$(DOWNEXT) $(HEADERADDR)\ + $(START16FILE) $(START16ADDR) 0 $(basename $@).bin $(RELOCADDR) 0 + rm -f $(basename $@).nxe +endef + +# BSP-specific tools +BIN2BOOT=$(PROJECT_TOOLS)/bin2boot diff --git a/bsps/i386/pc386/config/pc486.cfg b/bsps/i386/pc386/config/pc486.cfg new file mode 100644 index 0000000000..baab16dc32 --- /dev/null +++ b/bsps/i386/pc386/config/pc486.cfg @@ -0,0 +1,10 @@ +# +# Configuration file for a PC using an i486DX Class CPU +# + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mtune=i486 + +include $(RTEMS_ROOT)/make/custom/pc386.cfg + diff --git a/bsps/i386/pc386/config/pc586-sse.cfg b/bsps/i386/pc386/config/pc586-sse.cfg new file mode 100644 index 0000000000..764c40c44e --- /dev/null +++ b/bsps/i386/pc386/config/pc586-sse.cfg @@ -0,0 +1,9 @@ +# +# Configuration file for a PC using a Pentium Class CPU +# + +# This configuration is useful for SMP testing on Qemu +CPU_CFLAGS = -mtune=pentium -march=pentium -msse2 + +include $(RTEMS_ROOT)/make/custom/pc386.cfg + diff --git a/bsps/i386/pc386/config/pc586.cfg b/bsps/i386/pc386/config/pc586.cfg new file mode 100644 index 0000000000..35733a3cde --- /dev/null +++ b/bsps/i386/pc386/config/pc586.cfg @@ -0,0 +1,10 @@ +# +# Configuration file for a PC using a Pentium Class CPU +# + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mtune=pentium -march=pentium + +include $(RTEMS_ROOT)/make/custom/pc386.cfg + diff --git a/bsps/i386/pc386/config/pc686.cfg b/bsps/i386/pc386/config/pc686.cfg new file mode 100644 index 0000000000..fc63cde789 --- /dev/null +++ b/bsps/i386/pc386/config/pc686.cfg @@ -0,0 +1,10 @@ +# +# Configuration file for a PC using a PentiumPro Class CPU +# + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mtune=pentiumpro -march=pentium + +include $(RTEMS_ROOT)/make/custom/pc386.cfg + diff --git a/bsps/i386/pc386/config/pcp4.cfg b/bsps/i386/pc386/config/pcp4.cfg new file mode 100644 index 0000000000..75ec7d4666 --- /dev/null +++ b/bsps/i386/pc386/config/pcp4.cfg @@ -0,0 +1,17 @@ +# +# Configuration file for a PC using a Pentium Class CPU +# + +# Note: We give the -mtune=pentium option here only so that at least the +# variant optimized for pentium (w/o using any pentium-specific +# features) is used (assuming you use the vanilla RTEMS multilibs). +# +# And: The only sse-related feature the RTEMS support really needs is +# fxsave/fxrstor. You can build with -msse, -msse2 or -msse3, +# depending on your CPU. +# There are run-time checks resulting in a 'panic' if code +# compiled for e.g. -msse3 is executed on a CPU that only +# supports sse2, though. +CPU_CFLAGS = -mtune=pentium4 -march=pentium4 -msse3 + +include $(RTEMS_ROOT)/make/custom/pc386.cfg diff --git a/bsps/lm32/lm32_evr/config/lm32_evr.cfg b/bsps/lm32/lm32_evr/config/lm32_evr.cfg new file mode 100644 index 0000000000..fc6e65b768 --- /dev/null +++ b/bsps/lm32/lm32_evr/config/lm32_evr.cfg @@ -0,0 +1,29 @@ +# +# Config file for the lm32_evr BSP +# + +# Choices for CPU_MODEL: +# tiny (no cache) +# standard (instruction cache) +# fast (instruction and data cache) + +RTEMS_CPU = lm32 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = + +# optimize flag: typically -O2 +# ATM, doesn't work with optimization levels > 0 +CFLAGS_OPTIMIZE_V = -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \ + -R entry -R exceptions $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim-testsuite.tcfg b/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim-testsuite.tcfg new file mode 100644 index 0000000000..595806baed --- /dev/null +++ b/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim-testsuite.tcfg @@ -0,0 +1,6 @@ +# +# The GDB LM32 simulator in GDB +# + +include: testdata/disable-intrcritical-tests.tcfg + diff --git a/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim.cfg b/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim.cfg new file mode 100644 index 0000000000..2050654d44 --- /dev/null +++ b/bsps/lm32/lm32_evr/config/lm32_evr_gdbsim.cfg @@ -0,0 +1,5 @@ +# +# BSP Variant for running on simulator in GDB +# + +include $(RTEMS_ROOT)/make/custom/lm32_evr.cfg diff --git a/bsps/lm32/milkymist/config/milkymist.cfg b/bsps/lm32/milkymist/config/milkymist.cfg new file mode 100644 index 0000000000..4f280fc612 --- /dev/null +++ b/bsps/lm32/milkymist/config/milkymist.cfg @@ -0,0 +1,29 @@ +# +# Config file for the milkymist BSP +# + +# Choices for CPU_MODEL: +# tiny (no cache) +# standard (instruction cache) +# fast (instruction and data cache) + +RTEMS_CPU = lm32 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mbarrel-shift-enabled -mmultiply-enabled \ + -mdivide-enabled -msign-extend-enabled + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \ + -R entry -R exceptions $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/m32c/m32cbsp/config/m32csim-testsuite.tcfg b/bsps/m32c/m32cbsp/config/m32csim-testsuite.tcfg new file mode 100644 index 0000000000..d1eee4f443 --- /dev/null +++ b/bsps/m32c/m32cbsp/config/m32csim-testsuite.tcfg @@ -0,0 +1,28 @@ +# +# The GDB M32C Simulator does not have a tick interrupt. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/require-tick-isr.tcfg +include: testdata/disable-jffs2-tests.tcfg +include: testdata/disable-mrfs-tests.tcfg + +exclude: crypt01 +exclude: fileio +exclude: flashdisk01 +exclude: fsbdpart01 +exclude: fsdosfsformat01 +exclude: fsdosfswrite01 +exclude: fsdosfsname01 +exclude: fsrfsbitmap01 +exclude: sha +exclude: spstkalloc02 +exclude: sptls01 +exclude: sptls04 +exclude: tmcontext01 +exclude: utf8proc01 + +# +# Does not compile. See #3025. +# +exclude: linpack diff --git a/bsps/m32c/m32cbsp/config/m32csim.cfg b/bsps/m32c/m32cbsp/config/m32csim.cfg new file mode 100644 index 0000000000..9ea0d48b80 --- /dev/null +++ b/bsps/m32c/m32cbsp/config/m32csim.cfg @@ -0,0 +1,16 @@ +# +# Config file for the M32C GDB Simulator +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m32c + +CPU_CFLAGS = -mcpu=m32cm + +# Unreported GCC Bug results in ICE in cpu.c. Use -O0 +# CFLAGS_OPTIMIZE_V = -Os -g +CFLAGS_OPTIMIZE_V = -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/av5282/config/av5282.cfg b/bsps/m68k/av5282/config/av5282.cfg new file mode 100644 index 0000000000..1c82a4de12 --- /dev/null +++ b/bsps/m68k/av5282/config/av5282.cfg @@ -0,0 +1,30 @@ +# +# Config file for the uC5282 BSP +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=528x + + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2574. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +ifndef MTARGET +MTARGET=ram +endif + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/m68k/csb360/config/csb360.cfg b/bsps/m68k/csb360/config/csb360.cfg new file mode 100644 index 0000000000..8694aacec7 --- /dev/null +++ b/bsps/m68k/csb360/config/csb360.cfg @@ -0,0 +1,19 @@ +# +# Config file for a Cogent CSB360 +# +# Author: Jay Monkman <jtm@lopingdog.com> +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=5272 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/gen68340/config/gen68340.cfg b/bsps/m68k/gen68340/config/gen68340.cfg new file mode 100644 index 0000000000..5185e2c5a8 --- /dev/null +++ b/bsps/m68k/gen68340/config/gen68340.cfg @@ -0,0 +1,18 @@ +# +# Config file for a "generic 68340" BSP + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=cpu32 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2573. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/gen68360/config/gen68360.cfg b/bsps/m68k/gen68360/config/gen68360.cfg new file mode 100644 index 0000000000..d8e3d2c3a5 --- /dev/null +++ b/bsps/m68k/gen68360/config/gen68360.cfg @@ -0,0 +1,15 @@ +# +# Config file for a "generic 68360" BSP + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +CPU_CFLAGS = -mcpu=cpu32 + +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2566. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/gen68360/config/gen68360_040.cfg b/bsps/m68k/gen68360/config/gen68360_040.cfg new file mode 100644 index 0000000000..142f3c7ae4 --- /dev/null +++ b/bsps/m68k/gen68360/config/gen68360_040.cfg @@ -0,0 +1,16 @@ +# +# Configuration file for a 68040 using the 68360 in companion mode +# + +RTEMS_CPU=m68k + +CPU_CFLAGS = -mcpu=68040 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2566. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/gen68360/config/pgh360.cfg b/bsps/m68k/gen68360/config/pgh360.cfg new file mode 100644 index 0000000000..2303a62b45 --- /dev/null +++ b/bsps/m68k/gen68360/config/pgh360.cfg @@ -0,0 +1,15 @@ +# +# Config file for a "generic 68360" BSP + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +CPU_CFLAGS = -mcpu32 + +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2566. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/genmcf548x/config/COBRA5475.cfg b/bsps/m68k/genmcf548x/config/COBRA5475.cfg new file mode 100644 index 0000000000..1c27ee9741 --- /dev/null +++ b/bsps/m68k/genmcf548x/config/COBRA5475.cfg @@ -0,0 +1,10 @@ +# +# Config file for COBRA5475 module +# + +# +# All genmcf548x configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/genmcf548x.inc diff --git a/bsps/m68k/genmcf548x/config/genmcf548x.inc b/bsps/m68k/genmcf548x/config/genmcf548x.inc new file mode 100644 index 0000000000..330d47ed06 --- /dev/null +++ b/bsps/m68k/genmcf548x/config/genmcf548x.inc @@ -0,0 +1,23 @@ +# +# Config file for the genmcf548x BSP +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcfv4e -Wa,-memac + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \ + $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/m68k/genmcf548x/config/m5484FireEngine.cfg b/bsps/m68k/genmcf548x/config/m5484FireEngine.cfg new file mode 100644 index 0000000000..7322a36c9f --- /dev/null +++ b/bsps/m68k/genmcf548x/config/m5484FireEngine.cfg @@ -0,0 +1,10 @@ +# +# Config file for freescale's M5484FireEngine evaluation board +# + +# +# All genmcf548x configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/genmcf548x.inc diff --git a/bsps/m68k/mcf5206elite/config/mcf5206elite-testsuite.tcfg b/bsps/m68k/mcf5206elite/config/mcf5206elite-testsuite.tcfg new file mode 100644 index 0000000000..d11a487569 --- /dev/null +++ b/bsps/m68k/mcf5206elite/config/mcf5206elite-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# mcf5206elite RTEMS Test Database +# +# Format is one line per test that is _NOT_ built. +# + +exclude: fsdosfsname01 +exclude: dl05 diff --git a/bsps/m68k/mcf5206elite/config/mcf5206elite.cfg b/bsps/m68k/mcf5206elite/config/mcf5206elite.cfg new file mode 100644 index 0000000000..258727b9be --- /dev/null +++ b/bsps/m68k/mcf5206elite/config/mcf5206elite.cfg @@ -0,0 +1,21 @@ +# +# Config file for a MCF5206eLITE board BSP +# +# Author: Victor V. Vengerov <vvv@oktet.ru> +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=5206 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2572. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/m68k/mcf52235/config/mcf52235-testsuite.tcfg b/bsps/m68k/mcf52235/config/mcf52235-testsuite.tcfg new file mode 100644 index 0000000000..f81ea1d224 --- /dev/null +++ b/bsps/m68k/mcf52235/config/mcf52235-testsuite.tcfg @@ -0,0 +1,28 @@ +# +# MCF52235 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: capture +exclude: cdtest +exclude: dl05 +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsformat01 +exclude: fsdosfsname01 +exclude: ftp01 +exclude: iostream +exclude: linpack +exclude: loopback +exclude: mghttpd01 +exclude: monitor02 +exclude: paranoia +exclude: pppd +exclude: spstkalloc02 +exclude: syscall01 +exclude: tmfine01 +exclude: utf8proc01 diff --git a/bsps/m68k/mcf52235/config/mcf52235.cfg b/bsps/m68k/mcf52235/config/mcf52235.cfg new file mode 100644 index 0000000000..bc69711fd7 --- /dev/null +++ b/bsps/m68k/mcf52235/config/mcf52235.cfg @@ -0,0 +1,27 @@ +# +# Config file for the mcf5235 BSP +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=52235 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2570. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/m68k/mcf5225x/config/mcf5225x-testsuite.tcfg b/bsps/m68k/mcf5225x/config/mcf5225x-testsuite.tcfg new file mode 100644 index 0000000000..76d09e7ee7 --- /dev/null +++ b/bsps/m68k/mcf5225x/config/mcf5225x-testsuite.tcfg @@ -0,0 +1,16 @@ +# +# mcf5225x RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: cdtest +exclude: dl05 +exclude: fileio +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack diff --git a/bsps/m68k/mcf5225x/config/mcf5225x.cfg b/bsps/m68k/mcf5225x/config/mcf5225x.cfg new file mode 100644 index 0000000000..d195e46199 --- /dev/null +++ b/bsps/m68k/mcf5225x/config/mcf5225x.cfg @@ -0,0 +1,30 @@ +# +# Config file for the mcf5225x BSP +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This is the actual bsp directory used during the build process. +RTEMS_BSP_FAMILY=mcf5225x + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=52235 $(PROJECT_FLAGS) + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2568. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/m68k/mcf5235/config/mcf5235.cfg b/bsps/m68k/mcf5235/config/mcf5235.cfg new file mode 100644 index 0000000000..aed4e2ed5c --- /dev/null +++ b/bsps/m68k/mcf5235/config/mcf5235.cfg @@ -0,0 +1,31 @@ +# +# Config file for the mcf5235 BSP +# + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=5235 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2571. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +ifndef MTARGET +MTARGET=ram +endif + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/m68k/mcf5329/config/mcf5329.cfg b/bsps/m68k/mcf5329/config/mcf5329.cfg new file mode 100644 index 0000000000..88b6df6ce7 --- /dev/null +++ b/bsps/m68k/mcf5329/config/mcf5329.cfg @@ -0,0 +1,29 @@ +# +# Config file for the mcf5329 BSP +# + + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +#CPU_CFLAGS = -mcpu=5329 +CPU_CFLAGS = -mcpu=5307 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2569. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +# This defines the operations performed on the linked executable. +# is currently required. +define bsp-post-link + $(OBJCOPY) -O binary --strip-all \ + $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(SIZE) $(basename $@)$(EXEEXT) +endef diff --git a/bsps/m68k/mrm332/config/mrm332-testsuite.tcfg b/bsps/m68k/mrm332/config/mrm332-testsuite.tcfg new file mode 100644 index 0000000000..624b1d982c --- /dev/null +++ b/bsps/m68k/mrm332/config/mrm332-testsuite.tcfg @@ -0,0 +1,16 @@ +# +# mrm332 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: cdtest +exclude: dl05 +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: sptls01 +exclude: sptls02 +exclude: utf8proc01 diff --git a/bsps/m68k/mrm332/config/mrm332.cfg b/bsps/m68k/mrm332/config/mrm332.cfg new file mode 100644 index 0000000000..979f331399 --- /dev/null +++ b/bsps/m68k/mrm332/config/mrm332.cfg @@ -0,0 +1,28 @@ +# +# Config file for the mrm332 BSP +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m68k + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=cpu32 + +# using optimise for size due to small memory on target board. +CFLAGS_OPTIMIZE_V = -Os -g -fomit-frame-pointer + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2567. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec + sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \ + $(PACKHEX) > $(basename $@)$(DOWNEXT) + rm -f $(basename $@).srec + $(default-bsp-post-link) +endef + diff --git a/bsps/m68k/mvme147/config/mvme147.cfg b/bsps/m68k/mvme147/config/mvme147.cfg new file mode 100644 index 0000000000..18e9f28b71 --- /dev/null +++ b/bsps/m68k/mvme147/config/mvme147.cfg @@ -0,0 +1,25 @@ +# +# Config file for the mvme147 BSP +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m68k + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=68030 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec + sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \ + $(PACKHEX) > $(basename $@)$(DOWNEXT) + rm -f $(basename $@).srec + $(default-bsp-post-link) +endef diff --git a/bsps/m68k/mvme147s/config/mvme147s.cfg b/bsps/m68k/mvme147s/config/mvme147s.cfg new file mode 100644 index 0000000000..89922a518e --- /dev/null +++ b/bsps/m68k/mvme147s/config/mvme147s.cfg @@ -0,0 +1,27 @@ +# +# Config file for the mvme147s BSP +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m68k + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=68030 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@).srec + sed -e 's/.$$//' -e '/^S0/d' $(basename $@).srec | \ + $(PACKHEX) > $(basename $@)$(DOWNEXT) + rm -f $(basename $@).srec + $(default-bsp-post-link) +endef + +# Miscellaneous additions go here diff --git a/bsps/m68k/mvme162/config/mvme162-testsuite.tcfg b/bsps/m68k/mvme162/config/mvme162-testsuite.tcfg new file mode 100644 index 0000000000..8476d8ecff --- /dev/null +++ b/bsps/m68k/mvme162/config/mvme162-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# mvme162 RTEMS Test Database +# +# Format is one line per test that is _NOT_ built. +# + +exclude: fsdosfsname01 diff --git a/bsps/m68k/mvme162/config/mvme162.cfg b/bsps/m68k/mvme162/config/mvme162.cfg new file mode 100644 index 0000000000..db96fff921 --- /dev/null +++ b/bsps/m68k/mvme162/config/mvme162.cfg @@ -0,0 +1,29 @@ +# +# Config file for the mvme162 BSP +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m68k + +RTEMS_MVME162_MODEL=mvme162 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# + +CPU_CFLAGS = -mcpu=68040 -msoft-float + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef + +# BSP-specific tools +SLOAD=$(PROJECT_TOOLS)/sload diff --git a/bsps/m68k/mvme162/config/mvme162lx-testsuite.tcfg b/bsps/m68k/mvme162/config/mvme162lx-testsuite.tcfg new file mode 100644 index 0000000000..f1f680287a --- /dev/null +++ b/bsps/m68k/mvme162/config/mvme162lx-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# mvme162lx RTEMS Test Database +# +# Format is one line per test that is _NOT_ built. +# + +exclude: fsdosfsname01 diff --git a/bsps/m68k/mvme162/config/mvme162lx.cfg b/bsps/m68k/mvme162/config/mvme162lx.cfg new file mode 100644 index 0000000000..8483cf0d84 --- /dev/null +++ b/bsps/m68k/mvme162/config/mvme162lx.cfg @@ -0,0 +1,34 @@ +# +# Configuration file for a MVME162LX +# +# This is an MVME162 model with ... + +# +# All mvme162 configurations share the same base file, only the cpu model +# differs. +# + +RTEMS_MVME162_MODEL=mvme162lx + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=m68k + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=68040 -msoft-float + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef + +# BSP-specific tools +SLOAD=$(PROJECT_TOOLS)/sload diff --git a/bsps/m68k/mvme167/config/mvme167.cfg b/bsps/m68k/mvme167/config/mvme167.cfg new file mode 100644 index 0000000000..c40f248493 --- /dev/null +++ b/bsps/m68k/mvme167/config/mvme167.cfg @@ -0,0 +1,42 @@ +# +# Config file for the mvme167 BSP +# + +# THIS BSP USES ELF IMAGES. IT WILL NOT WORK WITH COFF UNLESS CHANGES +# ARE MADE TO THE LINKCMDS FILE. + +RTEMS_CPU=m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. We also specify the BSP during compilation. +# This should really get its own flag, but it works here. +# + +CPU_CFLAGS = -mcpu=68040 + + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-omit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# We use TFTP to transfer files to the MVME167. We generate binary files +# rather than S-records. We skip the header during downloads. + +# The MC68040 does not implement all MC68881/MC68882 instructions, so use +# either the gcc floating-point software support (msoft-float libraries), or +# use the Motorola FPSP floating-point emulator in +# rtems/c/src/lib/libcpu/m68k/m68040/fpsp +# The default is to use the FPSP. +# To use the msoft-float libraries, uncomment the three lines below. +# You then should comment the M68KFPSPInstallExceptionHandlers() statement +# in rtems/c/src/lib/libbsp/m68k/mvme167/startup/bststart.c in bsp_start(). +# Floating-point support will then be limited. See the mvme167 README file +# for more details. +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/m68k/uC5282/config/uC5282.cfg b/bsps/m68k/uC5282/config/uC5282.cfg new file mode 100644 index 0000000000..b8e3f52667 --- /dev/null +++ b/bsps/m68k/uC5282/config/uC5282.cfg @@ -0,0 +1,24 @@ +# +# Config file for the uC5282 BSP +# + +RTEMS_CPU = m68k + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=5282 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2575. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/mips/csb350/config/csb350.cfg b/bsps/mips/csb350/config/csb350.cfg new file mode 100644 index 0000000000..f6d50662b0 --- /dev/null +++ b/bsps/mips/csb350/config/csb350.cfg @@ -0,0 +1,19 @@ +# +# Config file for the Cogent CSB350 board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=mips + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +# gcc 3.1 and newer +CPU_CFLAGS = -mips32 -G0 -msoft-float + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/mips/hurricane/config/hurricane-testsuite.tcfg b/bsps/mips/hurricane/config/hurricane-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/mips/hurricane/config/hurricane-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/mips/hurricane/config/hurricane.cfg b/bsps/mips/hurricane/config/hurricane.cfg new file mode 100644 index 0000000000..b1c050b966 --- /dev/null +++ b/bsps/mips/hurricane/config/hurricane.cfg @@ -0,0 +1,22 @@ +# +# Config file for the Quick Logic Hurricane evaluation board with PMC-Sierra RM5231 cpu +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mips3 -G0 -EL + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O srec $@ $(basename $@).srec1 + $(PACKHEX) < $(basename $@).srec1 > $(basename $@)$(DOWNEXT) + $(RM) $(basename $@).srec1 + $(default-bsp-post-link) +endef diff --git a/bsps/mips/jmr3904/config/jmr3904-testsuite.tcfg b/bsps/mips/jmr3904/config/jmr3904-testsuite.tcfg new file mode 100644 index 0000000000..a8d24a09a9 --- /dev/null +++ b/bsps/mips/jmr3904/config/jmr3904-testsuite.tcfg @@ -0,0 +1,9 @@ +# +# The GDB MIPS JMR3904 simulator in GDB +# + +include: testdata/disable-intrcritical-tests.tcfg + +# The simulator catches the data access fault and exits before the +# simulated MIPS handler can run. +exclude: spfatal26 diff --git a/bsps/mips/jmr3904/config/jmr3904.cfg b/bsps/mips/jmr3904/config/jmr3904.cfg new file mode 100644 index 0000000000..ed4e6b3be0 --- /dev/null +++ b/bsps/mips/jmr3904/config/jmr3904.cfg @@ -0,0 +1,16 @@ +# +# Config file for the jmr3904 board which has a simulator in gdb +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=mips + +CPU_CFLAGS = -march=r3900 -Wa,-xgot -G0 + +CFLAGS_OPTIMIZE_V = -O2 -g + +# arguments to compile and link with per-element sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections + diff --git a/bsps/mips/malta/config/malta.cfg b/bsps/mips/malta/config/malta.cfg new file mode 100644 index 0000000000..a25abcc911 --- /dev/null +++ b/bsps/mips/malta/config/malta.cfg @@ -0,0 +1,17 @@ +# +# Config file for the MIPS Malta board with 24kf CPU +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=mips + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -march=24kf1_1 -Wa,-xgot -G0 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/mips/rbtx4925/config/rbtx4925-testsuite.tcfg b/bsps/mips/rbtx4925/config/rbtx4925-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/mips/rbtx4925/config/rbtx4925-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/mips/rbtx4925/config/rbtx4925.cfg b/bsps/mips/rbtx4925/config/rbtx4925.cfg new file mode 100644 index 0000000000..744fdb4240 --- /dev/null +++ b/bsps/mips/rbtx4925/config/rbtx4925.cfg @@ -0,0 +1,22 @@ +# +# Config file for the Toshiba RBTX4925 evaluation board with TX4925 cpu +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mips3 -G0 -EL + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O srec $@ $(basename $@).srec1 + $(PACKHEX) < $(basename $@).srec1 > $(basename $@)$(DOWNEXT) + $(RM) $(basename $@).srec1 + $(default-bsp-post-link) +endef diff --git a/bsps/mips/rbtx4938/config/rbtx4938-testsuite.tcfg b/bsps/mips/rbtx4938/config/rbtx4938-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/mips/rbtx4938/config/rbtx4938-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/mips/rbtx4938/config/rbtx4938.cfg b/bsps/mips/rbtx4938/config/rbtx4938.cfg new file mode 100644 index 0000000000..42cdf17a04 --- /dev/null +++ b/bsps/mips/rbtx4938/config/rbtx4938.cfg @@ -0,0 +1,20 @@ +# +# Config file for the Toshiba RBTX4938 evaluation board with TX4938 cpu +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mips3 -G0 -EL + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fomit-frame-pointer +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) --srec-len=30 -O srec $@ $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/moxie/moxiesim/config/moxiesim-testsuite.tcfg b/bsps/moxie/moxiesim/config/moxiesim-testsuite.tcfg new file mode 100644 index 0000000000..056d1c406f --- /dev/null +++ b/bsps/moxie/moxiesim/config/moxiesim-testsuite.tcfg @@ -0,0 +1,6 @@ +# +# The GDB Moxie Simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/moxie/moxiesim/config/moxiesim.cfg b/bsps/moxie/moxiesim/config/moxiesim.cfg new file mode 100644 index 0000000000..4d924d9c76 --- /dev/null +++ b/bsps/moxie/moxiesim/config/moxiesim.cfg @@ -0,0 +1,14 @@ +# +# Config file for the moxie simulator in gdb. +# +# $Id: moxiesxsim.cfg,v 1.2 2009/10/21 10:41:27 ralf Exp $ +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=moxie + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -Os -g -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/nios2/nios2_iss/config/nios2_iss.cfg b/bsps/nios2/nios2_iss/config/nios2_iss.cfg new file mode 100644 index 0000000000..f7103703ce --- /dev/null +++ b/bsps/nios2/nios2_iss/config/nios2_iss.cfg @@ -0,0 +1,29 @@ +# +# Config file for the NIOS2_EB2_1 BSP +# + +# Choices for CPU_MODEL: +# tiny (no cache) +# standard (instruction cache) +# fast (instruction and data cache) + +RTEMS_CPU = nios2 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mno-hw-mul -mno-hw-div + +# optimize flag: typically -O2 +# ATM, doesn't work with optimization levels > 0 +CFLAGS_OPTIMIZE_V = -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(OBJCOPY) -O binary --strip-all $(basename $@)$(EXEEXT) \ + -R entry -R exceptions $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/no_cpu/no_bsp/config/no_bsp.cfg b/bsps/no_cpu/no_bsp/config/no_bsp.cfg new file mode 100644 index 0000000000..15e2f29bff --- /dev/null +++ b/bsps/no_cpu/no_bsp/config/no_bsp.cfg @@ -0,0 +1,13 @@ +# +# Configuration file for the "no_bsp" board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=no_cpu + +# Miscellaneous additions go here. Typical options usually look like +CFLAGS_OPTIMIZE_V += -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/or1k/generic_or1k/config/generic_or1k-testsuite.tcfg b/bsps/or1k/generic_or1k/config/generic_or1k-testsuite.tcfg new file mode 100644 index 0000000000..15179ba22f --- /dev/null +++ b/bsps/or1k/generic_or1k/config/generic_or1k-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# generic_or1k RTEMS Test Database. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-intrcritical-tests.tcfg + +exclude: sptls02 diff --git a/bsps/or1k/generic_or1k/config/generic_or1k.cfg b/bsps/or1k/generic_or1k/config/generic_or1k.cfg new file mode 100644 index 0000000000..9a00643bce --- /dev/null +++ b/bsps/or1k/generic_or1k/config/generic_or1k.cfg @@ -0,0 +1,10 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = or1k + +CPU_CFLAGS = -O2 + +CFLAGS_OPTIMIZE_V ?= -O0 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/beatnik/config/beatnik.cfg b/bsps/powerpc/beatnik/config/beatnik.cfg new file mode 100644 index 0000000000..1190cadf62 --- /dev/null +++ b/bsps/powerpc/beatnik/config/beatnik.cfg @@ -0,0 +1,39 @@ +# +# Config file for the PowerPC 745x based mvmexxxx +# +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc +RTEMS_PPC_EXCEPTION_PROCESSING_MODEL=new + +# This is the actual bsp directory used during the build process. +RTEMS_BSP_FAMILY=beatnik + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=7400 -D__ppc_generic +#T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi + +# optimize flag: typically -0, could use -O4 or -fast +# -O4 is ok for RTEMS +# NOTE: some level of -O may be actually required by inline assembler +#CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# debug flags: typically none, but at least -O1 is required due to this +# BSP using inlined code +CFLAGS_DEBUG_V = -O1 -g + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $@ $(basename $@)$(DOWNEXT) +endef + +# Miscellaneous additions go here +START_BASE = motld_start diff --git a/bsps/powerpc/gen5200/config/brs5l.cfg b/bsps/powerpc/gen5200/config/brs5l.cfg new file mode 100644 index 0000000000..d6e556a183 --- /dev/null +++ b/bsps/powerpc/gen5200/config/brs5l.cfg @@ -0,0 +1,10 @@ +# +# Config file for customer specific MPC5200 board +# + +# +# All GEN5200 configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen5200/config/brs6l.cfg b/bsps/powerpc/gen5200/config/brs6l.cfg new file mode 100644 index 0000000000..d6e556a183 --- /dev/null +++ b/bsps/powerpc/gen5200/config/brs6l.cfg @@ -0,0 +1,10 @@ +# +# Config file for customer specific MPC5200 board +# + +# +# All GEN5200 configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen5200/config/dp2.cfg b/bsps/powerpc/gen5200/config/dp2.cfg new file mode 100644 index 0000000000..81941fe0dc --- /dev/null +++ b/bsps/powerpc/gen5200/config/dp2.cfg @@ -0,0 +1,5 @@ +# +# Config file for Direct Prototyping Data Processing (DP2) board. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen5200/config/gen5200.inc b/bsps/powerpc/gen5200/config/gen5200.inc new file mode 100644 index 0000000000..71c605c8da --- /dev/null +++ b/bsps/powerpc/gen5200/config/gen5200.inc @@ -0,0 +1,19 @@ +# +# Shared base config file for GEN5200 BSPs +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=603e -mstrict-align \ + -meabi -msdata=sysv -fno-common + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/gen5200/config/icecube.cfg b/bsps/powerpc/gen5200/config/icecube.cfg new file mode 100644 index 0000000000..c53040e1b3 --- /dev/null +++ b/bsps/powerpc/gen5200/config/icecube.cfg @@ -0,0 +1,12 @@ +# +# Config file for Freescale 5200Lite a.k.a. IceCube +# +# NOTE: This is the same as the Embedded Planets EP5200C and +# possibly other MPC5200 boards. + +# +# All GEN5200 configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen5200/config/pm520_cr825.cfg b/bsps/powerpc/gen5200/config/pm520_cr825.cfg new file mode 100644 index 0000000000..d86814ab66 --- /dev/null +++ b/bsps/powerpc/gen5200/config/pm520_cr825.cfg @@ -0,0 +1,10 @@ +# +# Config file for MicroSys PM520 Module (based on MPC5200) +# on carrier board CR825 + +# +# All GEN5200 configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen5200/config/pm520_ze30.cfg b/bsps/powerpc/gen5200/config/pm520_ze30.cfg new file mode 100644 index 0000000000..e16e2e1886 --- /dev/null +++ b/bsps/powerpc/gen5200/config/pm520_ze30.cfg @@ -0,0 +1,10 @@ +# +# Config file for MicroSys PM520 Module (based on MPC5200) +# on carrier board ZE30 + +# +# All GEN5200 configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen5200.inc diff --git a/bsps/powerpc/gen83xx/config/br_uid.cfg b/bsps/powerpc/gen83xx/config/br_uid.cfg new file mode 100644 index 0000000000..0db23d54dd --- /dev/null +++ b/bsps/powerpc/gen83xx/config/br_uid.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc83xx_config +# +# @brief Configuration file for the BR UID base board +# + +include $(RTEMS_ROOT)/make/custom/gen83xx.inc diff --git a/bsps/powerpc/gen83xx/config/gen83xx.inc b/bsps/powerpc/gen83xx/config/gen83xx.inc new file mode 100644 index 0000000000..e1bee9f786 --- /dev/null +++ b/bsps/powerpc/gen83xx/config/gen83xx.inc @@ -0,0 +1,22 @@ +# +# Shared base config file for GEN83xx BSPs +# + +include $(RTEMS_ROOT)/make/custom/default.cfg +# +# FIXME: we might want to use the e300 CPU model explicitely, +# using -me300 +# but I doubt the compiler actually generates different code +# +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=603e -meabi -msdata=sysv -fno-common -mstrict-align + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/gen83xx/config/hsc_cm01.cfg b/bsps/powerpc/gen83xx/config/hsc_cm01.cfg new file mode 100644 index 0000000000..8f2ac1829d --- /dev/null +++ b/bsps/powerpc/gen83xx/config/hsc_cm01.cfg @@ -0,0 +1,10 @@ +# +# Config file for customer specific MPC8349 board +# + +# +# All GEN83xx configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen83xx.inc diff --git a/bsps/powerpc/gen83xx/config/mpc8309som.cfg b/bsps/powerpc/gen83xx/config/mpc8309som.cfg new file mode 100644 index 0000000000..be25fcd4fb --- /dev/null +++ b/bsps/powerpc/gen83xx/config/mpc8309som.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc83xx_config +# +# @brief Configuration file for the MPC8309 System on Module. +# + +include $(RTEMS_ROOT)/make/custom/gen83xx.inc diff --git a/bsps/powerpc/gen83xx/config/mpc8313erdb.cfg b/bsps/powerpc/gen83xx/config/mpc8313erdb.cfg new file mode 100644 index 0000000000..4a6331e8c4 --- /dev/null +++ b/bsps/powerpc/gen83xx/config/mpc8313erdb.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc83xx_config +# +# @brief Configuration file for the MPC8313E Reference Design Board. +# + +include $(RTEMS_ROOT)/make/custom/gen83xx.inc diff --git a/bsps/powerpc/gen83xx/config/mpc8349eamds.cfg b/bsps/powerpc/gen83xx/config/mpc8349eamds.cfg new file mode 100644 index 0000000000..b58c60a92a --- /dev/null +++ b/bsps/powerpc/gen83xx/config/mpc8349eamds.cfg @@ -0,0 +1,10 @@ +# +# Config file for freescale's MPC8349EAMDS evaluation board +# + +# +# All GEN83xx configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/gen83xx.inc diff --git a/bsps/powerpc/haleakala/config/haleakala.cfg b/bsps/powerpc/haleakala/config/haleakala.cfg new file mode 100644 index 0000000000..90b9292d0b --- /dev/null +++ b/bsps/powerpc/haleakala/config/haleakala.cfg @@ -0,0 +1,28 @@ +# +# Config file for a PowerPC 405 based card +# mhamel +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=405 -Dppc405 + +# optimize flag: typically -0, could use -O4 or -fast +# -O4 is ok for RTEMS +# NOTE: some level of -O may be actually required by inline assembler +CFLAGS_OPTIMIZE_V = -O1 -g + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2561. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/powerpc/motorola_powerpc/config/mcp750.cfg b/bsps/powerpc/motorola_powerpc/config/mcp750.cfg new file mode 100644 index 0000000000..691a76a65a --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/mcp750.cfg @@ -0,0 +1,31 @@ +# +# Config file for Motorola MCP750 -- a MPC750 CompactPCI board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=750 -Dmpc750 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) \ + $ $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef diff --git a/bsps/powerpc/motorola_powerpc/config/mtx603e.cfg b/bsps/powerpc/motorola_powerpc/config/mtx603e.cfg new file mode 100644 index 0000000000..dd889b8e70 --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/mtx603e.cfg @@ -0,0 +1,32 @@ +# +# Config file for Motorola MTX603e -- a MPC603e ATX form factor board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=603e -Dppc603e + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) \ + $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef + +# Miscellaneous additions go here diff --git a/bsps/powerpc/motorola_powerpc/config/mvme2100.cfg b/bsps/powerpc/motorola_powerpc/config/mvme2100.cfg new file mode 100644 index 0000000000..e358c2d7af --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/mvme2100.cfg @@ -0,0 +1,30 @@ +# +# Config file for Motorola MVME2100 -- a MPC8240 VMEBus board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=603e -Dppc603e + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -mmultiple -mstring -mstrict-align +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) \ + $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef diff --git a/bsps/powerpc/motorola_powerpc/config/mvme2307.cfg b/bsps/powerpc/motorola_powerpc/config/mvme2307.cfg new file mode 100644 index 0000000000..1a5115999b --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/mvme2307.cfg @@ -0,0 +1,30 @@ +# +# Config file for the PowerPC 604 based mvme2307 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=604 -mmultiple -mstring -mstrict-align -meabi + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef diff --git a/bsps/powerpc/motorola_powerpc/config/qemuprep-altivec.cfg b/bsps/powerpc/motorola_powerpc/config/qemuprep-altivec.cfg new file mode 100644 index 0000000000..9d09089f94 --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/qemuprep-altivec.cfg @@ -0,0 +1,37 @@ +# +# Config file for the PowerPC 604 based mvme2307 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=7400 -mmultiple -mstring -mstrict-align -D__ppc_generic + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +ifdef PURE_BINARY +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef +else +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef +endif diff --git a/bsps/powerpc/motorola_powerpc/config/qemuprep.cfg b/bsps/powerpc/motorola_powerpc/config/qemuprep.cfg new file mode 100644 index 0000000000..fa5abd6bba --- /dev/null +++ b/bsps/powerpc/motorola_powerpc/config/qemuprep.cfg @@ -0,0 +1,37 @@ +# +# Config file for the PowerPC 604 based mvme2307 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=powerpc -mmultiple -mstring -mstrict-align -D__ppc_generic + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +ifdef PURE_BINARY +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef +else +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary -R .comment -S $(basename $@)$(EXEEXT) rtems + gzip -vf9 rtems + $(LD) -o $(basename $@)$(DOWNEXT) $(PROJECT_RELEASE)/lib/bootloader.o \ + --just-symbols=$(basename $@)$(EXEEXT) \ + --no-warn-mismatch \ + -b binary rtems.gz -T $(PROJECT_RELEASE)/lib/ppcboot.lds \ + -Map $(basename $@).map && chmod 755 $@ + rm -f rtems.gz +endef +endif diff --git a/bsps/powerpc/mpc55xxevb/config/gwlcfm-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/gwlcfm-testsuite.tcfg new file mode 100644 index 0000000000..f8e516bb8e --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/gwlcfm-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# gwlcfm RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/gwlcfm.cfg b/bsps/powerpc/mpc55xxevb/config/gwlcfm.cfg new file mode 100644 index 0000000000..f9a40532cb --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/gwlcfm.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief configuration file for the GWLCFM MPC5516 board +# + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5566evb-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5566evb-testsuite.tcfg new file mode 100644 index 0000000000..cba4641dc3 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5566evb-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# mpc5566evb RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5566evb.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5566evb.cfg new file mode 100644 index 0000000000..0e19d66284 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5566evb.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief Configuration file for MPC5566 evaluation board. +# + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe-testsuite.tcfg new file mode 100644 index 0000000000..826a183b8e --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# mpc5566evb_spe RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5566evb_spe.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc55xx.inc b/bsps/powerpc/mpc55xxevb/config/mpc55xx.inc new file mode 100644 index 0000000000..5b0b843ac4 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc55xx.inc @@ -0,0 +1,23 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief Shared configuration file for the MPC55xx board family. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = powerpc + +CPU_CFLAGS_FLOAT ?= -msoft-float -mno-spe + +# FIXME +CPU_CFLAGS = -mcpu=8540 -meabi -msdata=sysv -fno-common $(CPU_CFLAGS_FLOAT) \ + -D__ppc_generic -mstrict-align + +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/mpc55xxevb/config/mpc55xx_spe.inc b/bsps/powerpc/mpc55xxevb/config/mpc55xx_spe.inc new file mode 100644 index 0000000000..fa69d09a3e --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc55xx_spe.inc @@ -0,0 +1,3 @@ +CPU_CFLAGS_FLOAT ?= -mspe -mabi=spe -mfloat-gprs=single + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu-testsuite.tcfg new file mode 100644 index 0000000000..84d7efad7b --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu-testsuite.tcfg @@ -0,0 +1,13 @@ +# +# mpc5643l_dpu RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: linpack +exclude: spstkalloc02 diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu.cfg new file mode 100644 index 0000000000..67fe396486 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5643l_dpu.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief Configuration file for MPC5643L Data Processing Unit board. +# + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb-testsuite.tcfg new file mode 100644 index 0000000000..373d10b544 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb-testsuite.tcfg @@ -0,0 +1,13 @@ +# +# mpc5643l_evb RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: flashdisk01 +exclude: fsdosfsname01 +exclude: linpack +exclude: spstkalloc02 diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb.cfg new file mode 100644 index 0000000000..eb9c0db185 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5643l_evb.cfg @@ -0,0 +1,10 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief Configuration file for XKT564LEVB evaluation board. +# + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5668g-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5668g-testsuite.tcfg new file mode 100644 index 0000000000..6c79cceeac --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5668g-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5668g.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5668g.cfg new file mode 100644 index 0000000000..b0cb600143 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5668g.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app-testsuite.tcfg new file mode 100644 index 0000000000..aa6f47e038 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app-testsuite.tcfg @@ -0,0 +1,8 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_app.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot-testsuite.tcfg new file mode 100644 index 0000000000..f359262339 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# mpc5674f_ecu508_boot RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_ecu508_boot.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6-testsuite.tcfg new file mode 100644 index 0000000000..c417b93df1 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6-testsuite.tcfg @@ -0,0 +1,11 @@ +# +# mpc5674f_rsm6 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: fsdosfsname01 +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674f_rsm6.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674fevb-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb-testsuite.tcfg new file mode 100644 index 0000000000..6c79cceeac --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674fevb.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb.cfg new file mode 100644 index 0000000000..eb1a3f5c3d --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb.cfg @@ -0,0 +1,11 @@ +## +# +# @file +# +# @ingroup mpc55xx_config +# +# @brief Configuration file for MPC567XEVBFXMB evaluation board equipped with +# an MPC5674F core from Freescale and Axiom. +# + +include $(RTEMS_ROOT)/make/custom/mpc55xx.inc diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe-testsuite.tcfg new file mode 100644 index 0000000000..6c79cceeac --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe-testsuite.tcfg @@ -0,0 +1,7 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg + +exclude: linpack diff --git a/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe.cfg b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/mpc5674fevb_spe.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554-testsuite.tcfg b/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554-testsuite.tcfg new file mode 100644 index 0000000000..3ca7f48c46 --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554-testsuite.tcfg @@ -0,0 +1,10 @@ +# +# phycore_mpc5554 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/dltests-broken-on-this-bsp.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: fsdosfsname01 diff --git a/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554.cfg b/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554.cfg new file mode 100644 index 0000000000..b0feb2e1ba --- /dev/null +++ b/bsps/powerpc/mpc55xxevb/config/phycore_mpc5554.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/mpc55xx_spe.inc diff --git a/bsps/powerpc/mpc8260ads/config/mpc8260ads.cfg b/bsps/powerpc/mpc8260ads/config/mpc8260ads.cfg new file mode 100644 index 0000000000..4869e726d6 --- /dev/null +++ b/bsps/powerpc/mpc8260ads/config/mpc8260ads.cfg @@ -0,0 +1,23 @@ +# +# Config file for MPC8260 based Motorola ADS board +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc +8XX_CPU_TYPE=8260 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +# CPU_CFLAGS = -mcpu=$(8XX_CPU_TYPE) -mstrict-align +CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260 \ + -meabi -msdata=sysv -fno-common + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2565. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/mvme3100/config/mvme3100.cfg b/bsps/powerpc/mvme3100/config/mvme3100.cfg new file mode 100644 index 0000000000..6e7c6950f5 --- /dev/null +++ b/bsps/powerpc/mvme3100/config/mvme3100.cfg @@ -0,0 +1,23 @@ +# +# Config file for the PowerPC 8540 based mvme3100 +# +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=powerpc -msoft-float -D__ppc_generic + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/powerpc/mvme5500/config/mvme5500.cfg b/bsps/powerpc/mvme5500/config/mvme5500.cfg new file mode 100644 index 0000000000..6a0fceabe7 --- /dev/null +++ b/bsps/powerpc/mvme5500/config/mvme5500.cfg @@ -0,0 +1,28 @@ +# +# Config file for the PowerPC 7455 based mvme5500 +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This is the actual bsp directory used during the build process. +RTEMS_BSP_FAMILY=mvme5500 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef + +# +START_BASE=mvme5500start diff --git a/bsps/powerpc/psim/config/psim.cfg b/bsps/powerpc/psim/config/psim.cfg new file mode 100644 index 0000000000..cb399493d2 --- /dev/null +++ b/bsps/powerpc/psim/config/psim.cfg @@ -0,0 +1,18 @@ +# +# Config file for the PowerPC 60x simulator - psim +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -meabi -mcpu=603e -msdata=sysv -fno-common -Dppc603e + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions + +# arguments to compile and link with per-element sections +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/qemuppc/config/qemuppc.cfg b/bsps/powerpc/qemuppc/config/qemuppc.cfg new file mode 100644 index 0000000000..f424ec22ee --- /dev/null +++ b/bsps/powerpc/qemuppc/config/qemuppc.cfg @@ -0,0 +1,24 @@ +# +# Config file for the PowerPC 60x simulator in Qemu +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=603e -Dppc603e + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2564. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O binary $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/powerpc/qoriq/config/qoriq.inc b/bsps/powerpc/qoriq/config/qoriq.inc new file mode 100644 index 0000000000..ff9586eec4 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq.inc @@ -0,0 +1,23 @@ +# +# Shared base config file for QorIQ BSPs +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = powerpc + +CPU_CFLAGS = -mcpu=8540 -meabi -msdata=sysv -fno-common -mstrict-align \ + -mspe -mabi=spe -mfloat-gprs=double \ + -D__ppc_generic + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# define bsp-post-link +# $(OBJCOPY) -O binary '$@' '$(basename $@).bin' +# gzip -f -9 '$(basename $@).bin' +# mkimage -A ppc -O linux -T kernel -a 0x4000 -e 0x4000 -name '$(notdir $@)' -d '$(basename $@).bin.gz' '$(basename $@).img' +# $(default-bsp-post-link) +# endef diff --git a/bsps/powerpc/qoriq/config/qoriq_core_0-testsuite.tcfg b/bsps/powerpc/qoriq/config/qoriq_core_0-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_core_0-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/powerpc/qoriq/config/qoriq_core_0.cfg b/bsps/powerpc/qoriq/config/qoriq_core_0.cfg new file mode 100644 index 0000000000..8ce12d84a3 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_core_0.cfg @@ -0,0 +1,3 @@ +# Config file for QorIQ Core 0 + +include $(RTEMS_ROOT)/make/custom/qoriq.inc diff --git a/bsps/powerpc/qoriq/config/qoriq_core_1-testsuite.tcfg b/bsps/powerpc/qoriq/config/qoriq_core_1-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_core_1-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/powerpc/qoriq/config/qoriq_core_1.cfg b/bsps/powerpc/qoriq/config/qoriq_core_1.cfg new file mode 100644 index 0000000000..ee7eadd947 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_core_1.cfg @@ -0,0 +1,3 @@ +# Config file for QorIQ Core 1 + +include $(RTEMS_ROOT)/make/custom/qoriq.inc diff --git a/bsps/powerpc/qoriq/config/qoriq_e500-testsuite.tcfg b/bsps/powerpc/qoriq/config/qoriq_e500-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e500-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/powerpc/qoriq/config/qoriq_e500.cfg b/bsps/powerpc/qoriq/config/qoriq_e500.cfg new file mode 100644 index 0000000000..91e957d967 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e500.cfg @@ -0,0 +1,3 @@ +# Config file for e500 or e500v2 core based QorIQ chips, e.g. P1020, P2040 + +include $(RTEMS_ROOT)/make/custom/qoriq.inc diff --git a/bsps/powerpc/qoriq/config/qoriq_e6500_32-testsuite.tcfg b/bsps/powerpc/qoriq/config/qoriq_e6500_32-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e6500_32-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/powerpc/qoriq/config/qoriq_e6500_32.cfg b/bsps/powerpc/qoriq/config/qoriq_e6500_32.cfg new file mode 100644 index 0000000000..d0f0391384 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e6500_32.cfg @@ -0,0 +1,13 @@ +# Config file for e6500 core based QorIQ chips, e.g. T2080, T4240 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = powerpc + +CPU_CFLAGS = -mcpu=e6500 -m32 -msdata=sysv -fno-common \ + -D__ppc_generic + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/qoriq/config/qoriq_e6500_64-testsuite.tcfg b/bsps/powerpc/qoriq/config/qoriq_e6500_64-testsuite.tcfg new file mode 100644 index 0000000000..fb84b55762 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e6500_64-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# This is the set of tests which are known to not link on this BSP +# + +include: testdata/dltests-broken-on-this-bsp.tcfg diff --git a/bsps/powerpc/qoriq/config/qoriq_e6500_64.cfg b/bsps/powerpc/qoriq/config/qoriq_e6500_64.cfg new file mode 100644 index 0000000000..b766fec8c9 --- /dev/null +++ b/bsps/powerpc/qoriq/config/qoriq_e6500_64.cfg @@ -0,0 +1,14 @@ +# Config file for e6500 core based QorIQ chips in 64-bit mode, e.g. T2080, +# T4240 + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = powerpc + +CPU_CFLAGS = -mcpu=e6500 -m64 -fno-common \ + -D__ppc_generic + +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/ss555/config/ss555.cfg b/bsps/powerpc/ss555/config/ss555.cfg new file mode 100644 index 0000000000..1745bb5cad --- /dev/null +++ b/bsps/powerpc/ss555/config/ss555.cfg @@ -0,0 +1,32 @@ +# +# Config file for an Intec Automation SS555 MPC555-based card +# +# This file is derived from: +# +# Config file for a PowerPC MPC860-based MBX821-001 card. +# Config file for a PowerPC 403 based helas403 card +# Config file for MPC860 based Ethernet Comm Board + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc +GCC_CPU_MODEL=505 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=$(GCC_CPU_MODEL) -Dmpc555 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions + +# FIXME: Disabled because linkcmds lacks proper KEEP() directives. See #2563. +# The following two lines enable compiling and linking on per element. +# CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections +# LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + cp $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(STRIP) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/powerpc/t32mppc/config/t32mppc.cfg b/bsps/powerpc/t32mppc/config/t32mppc.cfg new file mode 100644 index 0000000000..1bbfe76a09 --- /dev/null +++ b/bsps/powerpc/t32mppc/config/t32mppc.cfg @@ -0,0 +1,11 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = powerpc + +CPU_CFLAGS = -mcpu=8540 -meabi -msdata=sysv -fno-common -msoft-float -mno-spe \ + -D__ppc_generic + +CFLAGS_OPTIMIZE_V = -Og -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/powerpc/tqm8xx/config/pghplus.cfg b/bsps/powerpc/tqm8xx/config/pghplus.cfg new file mode 100644 index 0000000000..75eb65fe90 --- /dev/null +++ b/bsps/powerpc/tqm8xx/config/pghplus.cfg @@ -0,0 +1,10 @@ +# +# Config file for a PowerPC MPC860-based TQM8xx carrier board. +# + +# +# All TQM8xx configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/tqm8xx.inc diff --git a/bsps/powerpc/tqm8xx/config/tqm8xx.inc b/bsps/powerpc/tqm8xx/config/tqm8xx.inc new file mode 100644 index 0000000000..f9a31d0835 --- /dev/null +++ b/bsps/powerpc/tqm8xx/config/tqm8xx.inc @@ -0,0 +1,23 @@ +# +# Config file for a PowerPC MPC8xx-based TQM8xx carrier card +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +CPU_CFLAGS = -mcpu=860 -Dmpc860 \ + -mstrict-align -fno-strict-aliasing \ + -meabi -msdata=sysv -fno-common + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + cp $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) + $(STRIP) $(basename $@)$(DOWNEXT) + $(default-bsp-post-link) +endef diff --git a/bsps/powerpc/tqm8xx/config/tqm8xx_stk8xx.cfg b/bsps/powerpc/tqm8xx/config/tqm8xx_stk8xx.cfg new file mode 100644 index 0000000000..7b5ab01b8a --- /dev/null +++ b/bsps/powerpc/tqm8xx/config/tqm8xx_stk8xx.cfg @@ -0,0 +1,10 @@ +# +# Config file for a PowerPC MPC860-based TQM8xx starter kit base board +# + +# +# All TQM8xx configurations share the same base file, only a few +# parameters differ. +# + +include $(RTEMS_ROOT)/make/custom/tqm8xx.inc diff --git a/bsps/powerpc/virtex/config/virtex.cfg b/bsps/powerpc/virtex/config/virtex.cfg new file mode 100644 index 0000000000..412b0da7b9 --- /dev/null +++ b/bsps/powerpc/virtex/config/virtex.cfg @@ -0,0 +1,25 @@ +# +# Config file for a generic PowerPC 405 based card +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=403 -Dppc405 -meabi -msdata=sysv -fno-common + +# optimize flag: typically -0, could use -O4 or -fast +# -O4 is ok for RTEMS +# NOTE: some level of -O may be actually required by inline assembler +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef diff --git a/bsps/powerpc/virtex4/config/virtex4.cfg b/bsps/powerpc/virtex4/config/virtex4.cfg new file mode 100644 index 0000000000..a893abe9b5 --- /dev/null +++ b/bsps/powerpc/virtex4/config/virtex4.cfg @@ -0,0 +1,21 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=405 -Dppc405 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# Miscellaneous additions go here +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef + diff --git a/bsps/powerpc/virtex5/config/virtex5.cfg b/bsps/powerpc/virtex5/config/virtex5.cfg new file mode 100644 index 0000000000..6f039da854 --- /dev/null +++ b/bsps/powerpc/virtex5/config/virtex5.cfg @@ -0,0 +1,21 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=powerpc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -mcpu=440 -Dppc440 -msoft-float + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections + +# Miscellaneous additions go here +define bsp-post-link + $(default-bsp-post-link) + $(OBJCOPY) -O srec $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT) +endef + diff --git a/bsps/riscv/riscv_generic/config/riscv64_generic.cfg b/bsps/riscv/riscv_generic/config/riscv64_generic.cfg new file mode 100644 index 0000000000..04897e5bba --- /dev/null +++ b/bsps/riscv/riscv_generic/config/riscv64_generic.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = -mcmodel=medany + +CFLAGS_OPTIMIZE_V ?= -O0 -g diff --git a/bsps/riscv/riscv_generic/config/riscv_generic.cfg b/bsps/riscv/riscv_generic/config/riscv_generic.cfg new file mode 100644 index 0000000000..785ac42c67 --- /dev/null +++ b/bsps/riscv/riscv_generic/config/riscv_generic.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = riscv + +CPU_CFLAGS = + +CFLAGS_OPTIMIZE_V ?= -Os diff --git a/bsps/sh/gensh1/config/gensh1-testsuite.tcfg b/bsps/sh/gensh1/config/gensh1-testsuite.tcfg new file mode 100644 index 0000000000..c133712fd0 --- /dev/null +++ b/bsps/sh/gensh1/config/gensh1-testsuite.tcfg @@ -0,0 +1,12 @@ +# +# gensh1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/gensh1/config/gensh1.cfg b/bsps/sh/gensh1/config/gensh1.cfg new file mode 100644 index 0000000000..16b61d222b --- /dev/null +++ b/bsps/sh/gensh1/config/gensh1.cfg @@ -0,0 +1,22 @@ +# +# gensh1.cfg +# +# default configuration for Hitachi sh1 processors +# +# Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +CPU_CFLAGS = -m1 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/gensh2/config/gensh2-testsuite.tcfg b/bsps/sh/gensh2/config/gensh2-testsuite.tcfg new file mode 100644 index 0000000000..c5b0c88fae --- /dev/null +++ b/bsps/sh/gensh2/config/gensh2-testsuite.tcfg @@ -0,0 +1,12 @@ +# +# gensh2 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/gensh2/config/gensh2.cfg b/bsps/sh/gensh2/config/gensh2.cfg new file mode 100644 index 0000000000..49cf0850d2 --- /dev/null +++ b/bsps/sh/gensh2/config/gensh2.cfg @@ -0,0 +1,21 @@ +# +# gensh2.cfg +# +# default configuration for Hitachi sh1 processors +# +# Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/gensh4/config/gensh4.cfg b/bsps/sh/gensh4/config/gensh4.cfg new file mode 100644 index 0000000000..016262f11e --- /dev/null +++ b/bsps/sh/gensh4/config/gensh4.cfg @@ -0,0 +1,28 @@ +# +# gensh4.cfg +# +# default configuration for Hitachi SH7750 board +# +# Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia +# Author: Victor V. Vengerov <vvv@oktet.ru> + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +# +# Seems to be good without initialisation FPSCR. +# Also works with SH4_FPSCR_DN bit set. +#CPU_CFLAGS = -m4-single-only -mfmovd -ml +#CPU_CFLAGS = -m4-single -ml +# +# It works with SH4_FPSCR_PR bit set +CPU_CFLAGS = -m4 -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh1-testsuite.tcfg b/bsps/sh/shsim/config/simsh1-testsuite.tcfg new file mode 100644 index 0000000000..d567a8d697 --- /dev/null +++ b/bsps/sh/shsim/config/simsh1-testsuite.tcfg @@ -0,0 +1,15 @@ +# +# simsh1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh1.cfg b/bsps/sh/shsim/config/simsh1.cfg new file mode 100644 index 0000000000..0f1da687a8 --- /dev/null +++ b/bsps/sh/shsim/config/simsh1.cfg @@ -0,0 +1,18 @@ +# +# simsh1.cfg +# +# default configuration for gdb-simulation of Hitachi sh1 processors + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m1 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh2-testsuite.tcfg b/bsps/sh/shsim/config/simsh2-testsuite.tcfg new file mode 100644 index 0000000000..8d4f381dfd --- /dev/null +++ b/bsps/sh/shsim/config/simsh2-testsuite.tcfg @@ -0,0 +1,15 @@ +# +# simsh2 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh2.cfg b/bsps/sh/shsim/config/simsh2.cfg new file mode 100644 index 0000000000..cde1fb2fbf --- /dev/null +++ b/bsps/sh/shsim/config/simsh2.cfg @@ -0,0 +1,18 @@ +# +# simsh2.cfg +# +# default configuration for gdb-simulation of Hitachi sh2 processors + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh2e-testsuite.tcfg b/bsps/sh/shsim/config/simsh2e-testsuite.tcfg new file mode 100644 index 0000000000..100b61cc9d --- /dev/null +++ b/bsps/sh/shsim/config/simsh2e-testsuite.tcfg @@ -0,0 +1,14 @@ +# +# The GDB SH Simulator does not have a tick interrupt +# and the simsh2e configuration has limited memory. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh2e.cfg b/bsps/sh/shsim/config/simsh2e.cfg new file mode 100644 index 0000000000..ce34d26d78 --- /dev/null +++ b/bsps/sh/shsim/config/simsh2e.cfg @@ -0,0 +1,17 @@ +# +# Config file for the sh simulator in gdb as SH2E +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m2e -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sh/shsim/config/simsh4-testsuite.tcfg b/bsps/sh/shsim/config/simsh4-testsuite.tcfg new file mode 100644 index 0000000000..0fa2e7744e --- /dev/null +++ b/bsps/sh/shsim/config/simsh4-testsuite.tcfg @@ -0,0 +1,14 @@ +# +# The GDB SH Simulator does not have a tick interrupt +# and the simsh4 configuration has limited memory. +# + +include: testdata/require-tick-isr.tcfg +include: testdata/disable-intrcritical-tests.tcfg +include: testdata/disable-iconv-tests.tcfg + +exclude: fileio +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: utf8proc01 diff --git a/bsps/sh/shsim/config/simsh4.cfg b/bsps/sh/shsim/config/simsh4.cfg new file mode 100644 index 0000000000..c23a8b93b5 --- /dev/null +++ b/bsps/sh/shsim/config/simsh4.cfg @@ -0,0 +1,17 @@ +# +# Config file for the sh simulator in gdb +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sh + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -m4 -ml + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/erc32/config/erc32.cfg b/bsps/sparc/erc32/config/erc32.cfg new file mode 100644 index 0000000000..84cc752daf --- /dev/null +++ b/bsps/sparc/erc32/config/erc32.cfg @@ -0,0 +1,17 @@ +# +# Config file for the European Space Agency ERC32 +# a V7 SPARC processor derived from the Cypress 601/602 set. + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=cypress + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon2/config/at697f.cfg b/bsps/sparc/leon2/config/at697f.cfg new file mode 100644 index 0000000000..94ab6efbe9 --- /dev/null +++ b/bsps/sparc/leon2/config/at697f.cfg @@ -0,0 +1,17 @@ +# +# Config file for the AT697F LEON2 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon -mfix-at697f + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon2/config/leon2.cfg b/bsps/sparc/leon2/config/leon2.cfg new file mode 100644 index 0000000000..a5e76e7aa9 --- /dev/null +++ b/bsps/sparc/leon2/config/leon2.cfg @@ -0,0 +1,17 @@ +# +# Config file for the LEON2 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon3/config/gr712rc.cfg b/bsps/sparc/leon3/config/gr712rc.cfg new file mode 100644 index 0000000000..897dd0142f --- /dev/null +++ b/bsps/sparc/leon3/config/gr712rc.cfg @@ -0,0 +1,17 @@ +# +# Config file for the GR712RC LEON3 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon3 -mfix-gr712rc + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon3/config/gr740.cfg b/bsps/sparc/leon3/config/gr740.cfg new file mode 100644 index 0000000000..86da029c42 --- /dev/null +++ b/bsps/sparc/leon3/config/gr740.cfg @@ -0,0 +1 @@ +include $(RTEMS_ROOT)/make/custom/leon3.cfg diff --git a/bsps/sparc/leon3/config/leon3.cfg b/bsps/sparc/leon3/config/leon3.cfg new file mode 100644 index 0000000000..d931d6c5f1 --- /dev/null +++ b/bsps/sparc/leon3/config/leon3.cfg @@ -0,0 +1,17 @@ +# +# Config file for the LEON3 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon3 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon3/config/ut699.cfg b/bsps/sparc/leon3/config/ut699.cfg new file mode 100644 index 0000000000..a8fff49b3a --- /dev/null +++ b/bsps/sparc/leon3/config/ut699.cfg @@ -0,0 +1,17 @@ +# +# Config file for the UT699 LEON3 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon -mfix-ut699 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc/leon3/config/ut700.cfg b/bsps/sparc/leon3/config/ut700.cfg new file mode 100644 index 0000000000..bcca9010ed --- /dev/null +++ b/bsps/sparc/leon3/config/ut700.cfg @@ -0,0 +1,17 @@ +# +# Config file for the UT699e/UT700 LEON3 SPARC processor. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=leon3 -mfix-ut700 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc64/niagara/config/niagara.cfg b/bsps/sparc64/niagara/config/niagara.cfg new file mode 100644 index 0000000000..2fd8973bd6 --- /dev/null +++ b/bsps/sparc64/niagara/config/niagara.cfg @@ -0,0 +1,16 @@ +# +# Config file for the Niagara SPARC64 processor. +# +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc64 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=niagara -DSUN4V + +# optimize flag: typically -g -O2 +CFLAGS_OPTIMIZE_V = -g -O2 +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/sparc64/usiii/config/usiii.cfg b/bsps/sparc64/usiii/config/usiii.cfg new file mode 100644 index 0000000000..b9fad21839 --- /dev/null +++ b/bsps/sparc64/usiii/config/usiii.cfg @@ -0,0 +1,16 @@ +# +# Config file for the UltraSparc III, IV SPARC64 processors. +# TODO: currently configured and tested only for ultrasparc3 +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=sparc64 + +# This contains the compiler options necessary to select the CPU model +# and (hopefully) optimize for it. +CPU_CFLAGS = -mcpu=ultrasparc3 -DUS3 -DSUN4U + +# optimize flag: typically -g -O2 +CFLAGS_OPTIMIZE_V = -g -O2 +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/v850/gdbv850sim/config/v850e1sim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850e1sim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e1sim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850e1sim.cfg b/bsps/v850/gdbv850sim/config/v850e1sim.cfg new file mode 100644 index 0000000000..7aefdcf31c --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e1sim.cfg @@ -0,0 +1,7 @@ +# +# Base Config file for the v850 GDB Simulator as v850e1 +# + +CPU_CFLAGS = -mv850e1 + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850e2sim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850e2sim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e2sim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850e2sim.cfg b/bsps/v850/gdbv850sim/config/v850e2sim.cfg new file mode 100644 index 0000000000..0313ab82cd --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e2sim.cfg @@ -0,0 +1,7 @@ +# +# Base Config file for the v850 GDB Simulator as v850e2 +# + +CPU_CFLAGS = -mv850e2 + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850e2v3sim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850e2v3sim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e2v3sim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850e2v3sim.cfg b/bsps/v850/gdbv850sim/config/v850e2v3sim.cfg new file mode 100644 index 0000000000..ac2740ed52 --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850e2v3sim.cfg @@ -0,0 +1,7 @@ +# +# Base Config file for the v850 GDB Simulator as v850e2v3 +# + +CPU_CFLAGS = -mv850e2v3 + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850esim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850esim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850esim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850esim.cfg b/bsps/v850/gdbv850sim/config/v850esim.cfg new file mode 100644 index 0000000000..0c0a4a9bed --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850esim.cfg @@ -0,0 +1,7 @@ +# +# Base Config file for the v850 GDB Simulator as v850e +# + +CPU_CFLAGS = -mv850e + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850essim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850essim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850essim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850essim.cfg b/bsps/v850/gdbv850sim/config/v850essim.cfg new file mode 100644 index 0000000000..77594591ec --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850essim.cfg @@ -0,0 +1,7 @@ +# +# Base Config file for the v850 GDB Simulator as v850es +# + +CPU_CFLAGS = -mv850es + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850sim-testsuite.tcfg b/bsps/v850/gdbv850sim/config/v850sim-testsuite.tcfg new file mode 100644 index 0000000000..4bec8f5bbc --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850sim-testsuite.tcfg @@ -0,0 +1,5 @@ +# +# The simulator does not have a tick interrupt. +# + +include: testdata/require-tick-isr.tcfg diff --git a/bsps/v850/gdbv850sim/config/v850sim.cfg b/bsps/v850/gdbv850sim/config/v850sim.cfg new file mode 100644 index 0000000000..9dcc918423 --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850sim.cfg @@ -0,0 +1,8 @@ +# +# Base Config file for the v850 GDB Simulator as v850 +# + +# This is the same as not specifying a CPU model flag. +CPU_CFLAGS = -mv850 + +include $(RTEMS_ROOT)/make/custom/v850sim.inc diff --git a/bsps/v850/gdbv850sim/config/v850sim.inc b/bsps/v850/gdbv850sim/config/v850sim.inc new file mode 100644 index 0000000000..8b363ea2ec --- /dev/null +++ b/bsps/v850/gdbv850sim/config/v850sim.inc @@ -0,0 +1,14 @@ +# +# Shared config file for the v850 GDB Simulator +# +# CPU_CFLAGS is set by each specific variant. + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU=v850 + +# optimize flag: typically -O2 +CFLAGS_OPTIMIZE_V = -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections |