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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-08-31 14:12:14 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-08-31 16:19:53 +0200 |
commit | d556af36059c420afeb4847247b965d45d26f9dc (patch) | |
tree | c1a3e18811aca190f44953e2c3fc946140b0bbbd /bsps/riscv | |
parent | bsp/xilinx-zynq: Flush TX-Buffer before initializing uart (diff) | |
download | rtems-d556af36059c420afeb4847247b965d45d26f9dc.tar.bz2 |
bsps: Always install IPI in SMP configs
The inter-processor interrupt (IPI) may be used to process per-CPU jobs.
See for example the blocked handler in T_interrupt_test().
Update #3199.
Diffstat (limited to 'bsps/riscv')
-rw-r--r-- | bsps/riscv/griscv/start/bspsmp.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/bsps/riscv/griscv/start/bspsmp.c b/bsps/riscv/griscv/start/bspsmp.c index df826f8217..0e5fd9903b 100644 --- a/bsps/riscv/griscv/start/bspsmp.c +++ b/bsps/riscv/griscv/start/bspsmp.c @@ -55,18 +55,15 @@ void bsp_start_on_secondary_processor(Per_CPU_Control *cpu_self) uint32_t _CPU_SMP_Initialize(void) { - if ( rtems_configuration_get_maximum_processors() > 1 ) { - GRLIB_Cpu_Unmask_interrupt(GRLIB_mp_irq, _CPU_SMP_Get_current_processor()); - - rtems_interrupt_handler_install( - GRLIB_mp_irq, - "IPI", - RTEMS_INTERRUPT_SHARED, - bsp_inter_processor_interrupt, - NULL - ); - - } + GRLIB_Cpu_Unmask_interrupt(GRLIB_mp_irq, _CPU_SMP_Get_current_processor()); + + rtems_interrupt_handler_install( + GRLIB_mp_irq, + "IPI", + RTEMS_INTERRUPT_SHARED, + bsp_inter_processor_interrupt, + NULL + ); return grlib_get_cpu_count(GRLIB_IrqCtrl_Regs); } |