diff options
author | Pragnesh Patel <pragnesh.patel@sifive.com> | 2019-10-22 10:20:05 +0000 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-10-23 08:11:50 +0200 |
commit | a7f5e42cc5234f239a01b8f69847ebb018710948 (patch) | |
tree | 75d1abe5128bc54b678580c7d2d03b6823568e70 /bsps/riscv/riscv/clock/clockdrv.c | |
parent | libdebugger/arm: Clean up the building on arm variants. (diff) | |
download | rtems-a7f5e42cc5234f239a01b8f69847ebb018710948.tar.bz2 |
riscv: add freedom E310 Arty A7 bsp
Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board.
Update #3785.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Diffstat (limited to 'bsps/riscv/riscv/clock/clockdrv.c')
-rw-r--r-- | bsps/riscv/riscv/clock/clockdrv.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/bsps/riscv/riscv/clock/clockdrv.c b/bsps/riscv/riscv/clock/clockdrv.c index 7e6034d4d1..d085b6bd95 100644 --- a/bsps/riscv/riscv/clock/clockdrv.c +++ b/bsps/riscv/riscv/clock/clockdrv.c @@ -130,15 +130,21 @@ static uint32_t riscv_clock_get_timecount(struct timecounter *base) static uint32_t riscv_clock_get_timebase_frequency(const void *fdt) { int node; - const uint32_t *val; - int len; + const fdt32_t *val; + int len=0; node = fdt_path_offset(fdt, "/cpus"); - val = fdt_getprop(fdt, node, "timebase-frequency", &len); + + val = (fdt32_t *) fdt_getprop(fdt, node, "timebase-frequency", &len); + if (val == NULL || len < 4) { - bsp_fatal(RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE); - } + int cpu0 = fdt_subnode_offset(fdt, node, "cpu@0"); + val = (fdt32_t *) fdt_getprop(fdt, cpu0, "timebase-frequency", &len); + if (val == NULL || len < 4) { + bsp_fatal(RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE); + } + } return fdt32_to_cpu(*val); } |