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author | Chris Johns <chrisj@rtems.org> | 2017-12-23 18:18:56 +1100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-01-25 08:45:26 +0100 |
commit | 2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch) | |
tree | 44759efe9374f13200a97e96d91bd9a2b7e5ce2a /bsps/powerpc/ss555/include/bsp/irq.h | |
parent | MAINTAINERS: Add myself to Write After Approval. (diff) | |
download | rtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2 |
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.
This has at least seven problems:
* The make preinstall step itself needs time and disk space.
* Errors in header files show up in the build tree copy. This makes it
hard for editors to open the right file to fix the error.
* There is no clear relationship between source and build tree header
files. This makes an audit of the build process difficult.
* The visibility of all header files in the build tree makes it
difficult to enforce API barriers. For example it is discouraged to
use BSP-specifics in the cpukit.
* An introduction of a new build system is difficult.
* Include paths specified by the -B option are system headers. This
may suppress warnings.
* The parallel build had sporadic failures on some hosts.
This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.
The new cpukit include directories are:
* cpukit/include
* cpukit/score/cpu/@RTEMS_CPU@/include
* cpukit/libnetworking
The new BSP include directories are:
* bsps/include
* bsps/@RTEMS_CPU@/include
* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include
There are build tree include directories for generated files.
The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.
The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.
Update #3254.
Diffstat (limited to 'bsps/powerpc/ss555/include/bsp/irq.h')
-rw-r--r-- | bsps/powerpc/ss555/include/bsp/irq.h | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/bsps/powerpc/ss555/include/bsp/irq.h b/bsps/powerpc/ss555/include/bsp/irq.h new file mode 100644 index 0000000000..44e39608b1 --- /dev/null +++ b/bsps/powerpc/ss555/include/bsp/irq.h @@ -0,0 +1,66 @@ +/* irq.h + * + * This include file describe the data structure and the functions implemented + * by rtems to write interrupt handlers. + * + * + * SS555 port sponsored by Defence Research and Development Canada - Suffield + * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) + * + * Derived from libbsp/powerpc/mbx8xx/irq/irq.h: + * + * CopyRight (C) 1999 valette@crf.canon.fr + * + * This code is heavilly inspired by the public specification of STREAM V2 + * that can be found at : + * + * <http://www.chorus.com/Documentation/index.html> by following + * the STREAM API Specification Document link. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#ifndef LIBBSP_POWERPC_SS555_IRQ_IRQ_H +#define LIBBSP_POWERPC_SS555_IRQ_IRQ_H + +#include <libcpu/irq.h> + +#ifndef ASM + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * These are no longer prototyped anywhere else. This appears to be + * remnants of the IRQ code upgrade. + * + * --joel 28 April 2010 + */ +int CPU_install_rtems_irq_handler(const rtems_irq_connect_data* irq); +int CPU_get_current_rtems_irq_handler(rtems_irq_connect_data* irq); +int CPU_remove_rtems_irq_handler(const rtems_irq_connect_data* irq); +int CPU_rtems_irq_mngt_set(rtems_irq_global_settings* config); +int CPU_rtems_irq_mngt_get(rtems_irq_global_settings** config); +void C_default_exception_handler(CPU_Exception_frame* excPtr); + +/* + * The SS555 has no external interrupt controller chip, so use the standard + * routines from the CPU-dependent code. + */ +#define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr) +#define BSP_get_current_rtems_irq_handler(ptr) CPU_get_current_rtems_irq_handler(ptr) +#define BSP_remove_rtems_irq_handler(ptr) CPU_remove_rtems_irq_handler(ptr) +#define BSP_rtems_irq_mngt_set(config) CPU_rtems_irq_mngt_set(config) +#define BSP_rtems_irq_mngt_get(config) CPU_rtems_irq_mngt_get(config) +#define BSP_rtems_irq_mng_init(cpuId) CPU_rtems_irq_mng_init(cpuId) + +#ifdef __cplusplus +} +#endif + +#endif /* ASM */ + +#endif /* LIBBSP_POWERPC_SS555_IRQ_IRQ_H */ |