Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 124 insertions, 0 deletions

diff --git a/bsps/powerpc/include/bsp/irq_supp.h b/bsps/powerpc/include/bsp/irq_supp.h
new file mode 100644
index 0000000000..65af48c87f
--- /dev/null
+++ b/bsps/powerpc/include/bsp/irq_supp.h
@@ -0,0 +1,124 @@
+/*
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef IRQ_SHARED_IRQ_C_GLUE_H
+#define IRQ_SHARED_IRQ_C_GLUE_H
+/*
+ *  This header describes the routines that are needed by the shared
+ *  version of 'irq.c' (implementing the RTEMS irq API). They
+ *  must be provided by the BSP.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ */
+
+#ifndef BSP_SHARED_HANDLER_SUPPORT
+#define BSP_SHARED_HANDLER_SUPPORT      1
+#endif
+
+#include <rtems.h>
+#include <rtems/irq.h>
+
+#include <bsp/vectors.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * PIC-independent functions to enable/disable interrupt lines at
+ * the pic.
+ *
+ * NOTE: the routines must ignore requests for enabling/disabling
+ *       interrupts that are outside of the range handled by the
+ *       PIC(s).
+ */
+extern void BSP_enable_irq_at_pic(const rtems_irq_number irqLine);
+/*
+ * RETURNS: nonzero (> 0 ) if irq was enabled originally, zero if irq
+ *          was off and negative value if there was an error.
+ */
+extern int  BSP_disable_irq_at_pic(const rtems_irq_number irqLine);
+
+/*
+ * Initialize the PIC.
+ */
+extern int  BSP_setup_the_pic(rtems_irq_global_settings* config);
+
+/* IRQ dispatcher to be defined by the PIC driver; note that it MUST
+ * implement shared interrupts.
+ * Note also that the exception frame passed to this handler is not very
+ * meaningful. Only the volatile registers and vector info are stored.
+ *
+ *******************************************************************
+ * The routine must return zero if the interrupt was handled. If a
+ * nonzero value is returned the dispatcher may panic and flag an
+ * uncaught exception.
+ *******************************************************************
+ */
+int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum);
+
+/*
+ * Snippet to be used by PIC drivers and by bsp_irq_dispatch_list
+ * traverses list of shared handlers for a given interrupt
+ *
+ */
+
+static inline void
+bsp_irq_dispatch_list_base(
+  rtems_irq_connect_data *tbl,
+  unsigned irq,
+  rtems_irq_hdl sentinel
+)
+{
+	rtems_irq_connect_data* vchain;
+	for( vchain = &tbl[irq];
+			((intptr_t)vchain != -1 && vchain->hdl != sentinel);
+			vchain = (rtems_irq_connect_data*)vchain->next_handler )
+	{
+          vchain->hdl(vchain->handle);
+	}
+}
+
+
+/*
+ * Snippet to be used by PIC drivers;
+ * enables interrupts, traverses list of
+ * shared handlers for a given interrupt
+ * and restores original irq level
+ *
+ * Note that _ISR_Get_level() & friends are preferable to
+ * manipulating MSR directly.
+ */
+
+static inline void
+bsp_irq_dispatch_list(
+  rtems_irq_connect_data *tbl,
+  unsigned irq,
+  rtems_irq_hdl sentinel
+)
+{
+	register uint32_t l_orig;
+
+	l_orig = _ISR_Get_level();
+
+	/* Enable all interrupts */
+	_ISR_Set_level(0);
+
+
+        bsp_irq_dispatch_list_base( tbl, irq, sentinel );
+
+	/* Restore original level */
+	_ISR_Set_level(l_orig);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif