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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 12:08:42 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-20 13:52:19 +0200 |
commit | e0dd8a5ad830798bc8082b03b8c42c32fb9660e0 (patch) | |
tree | d147bfc4d670fcdfbd2e2d2e75eb209f92e07df1 /bsps/m68k/mvme162 | |
parent | bsps: Move startup files to bsps (diff) | |
download | rtems-e0dd8a5ad830798bc8082b03b8c42c32fb9660e0.tar.bz2 |
bsps: Move benchmark timer to bsps
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/m68k/mvme162')
-rw-r--r-- | bsps/m68k/mvme162/btimer/btimer.c | 73 | ||||
-rw-r--r-- | bsps/m68k/mvme162/btimer/timerisr.S | 44 |
2 files changed, 117 insertions, 0 deletions
diff --git a/bsps/m68k/mvme162/btimer/btimer.c b/bsps/m68k/mvme162/btimer/btimer.c new file mode 100644 index 0000000000..c7dce0475d --- /dev/null +++ b/bsps/m68k/mvme162/btimer/btimer.c @@ -0,0 +1,73 @@ +/* + * This routine initializes the Tick Timer 1 on the MVME162 board. + * + * COPYRIGHT (c) 1989-1999. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + * + * Modifications of respective RTEMS file: COPYRIGHT (c) 1994. + * EISCAT Scientific Association. M.Savitski + * + * This material is a part of the MVME162 Board Support Package + * for the RTEMS executive. Its licensing policies are those of the + * RTEMS above. + */ + +#include <rtems.h> +#include <rtems/btimer.h> +#include <bsp.h> + +/* Periodic tick interval */ +#define TICK_INTERVAL 0x10000U +#define TIMER_INT_LEVEL 6 + +uint32_t Ttimer_val; +bool benchmark_timer_find_average_overhead; + +rtems_isr timerisr(rtems_vector_number vector); + +void benchmark_timer_initialize(void) +{ + (void) set_vector( timerisr, VBR0 * 0x10 + 0x8, 0 ); + + Ttimer_val = 0; /* clear timer ISR count */ + lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ + lcsr->intr_clear |= 0x01000000; /* clear pending interrupt */ + lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ + lcsr->timer_cmp_1 = TICK_INTERVAL; + lcsr->timer_cnt_1 = 0; /* clear counter */ + lcsr->board_ctl |= 7; /* increment, reset-on-compare, */ + /* and clear-overflow-cnt */ + + lcsr->intr_level[0] |= TIMER_INT_LEVEL; /* set int level */ + lcsr->intr_ena |= 0x01000000; /* enable tick timer 1 interrupt */ +} + +#define AVG_OVERHEAD 3U /* It typically takes 3.0 microseconds */ + /* (3 countdowns) to start/stop the timer. */ +#define LEAST_VALID 10U /* Don't trust a value lower than this */ + +benchmark_timer_t benchmark_timer_read(void) +{ + uint32_t total; + + total = (Ttimer_val * TICK_INTERVAL) + lcsr->timer_cnt_1; + + if ( benchmark_timer_find_average_overhead == true ) + return total; /* in one-half microsecond units */ + + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + + return (total-AVG_OVERHEAD) >> 1; +} + +void benchmark_timer_disable_subtracting_average_overhead( + bool find_flag +) +{ + benchmark_timer_find_average_overhead = find_flag; +} diff --git a/bsps/m68k/mvme162/btimer/timerisr.S b/bsps/m68k/mvme162/btimer/timerisr.S new file mode 100644 index 0000000000..c433d91c59 --- /dev/null +++ b/bsps/m68k/mvme162/btimer/timerisr.S @@ -0,0 +1,44 @@ +/* timer_isr() + * + * This routine provides the ISR for the Z8036 timer on the MVME136 + * board. The timer is set up to generate an interrupt at maximum + * intervals. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989-1999. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + * + * Modifications of respective RTEMS file: COPYRIGHT (c) 1994. + * EISCAT Scientific Association. M.Savitski + * + * This material is a part of the MVME162 Board Support Package + * for the RTEMS executive. Its licensing policies are those of the + * RTEMS above. + */ + +#include <rtems/asm.h> + +BEGIN_CODE + +.set INTR_CLEAR_REG, 0xfff40074 | interrupt clear register +.set RELOAD, 0x01000000 | clear tick 1 interrupt + + PUBLIC (Ttimer_val) + PUBLIC (timerisr) +SYM (timerisr): + move.l a0, -(a7) | save a0 + movea.l #INTR_CLEAR_REG, a0 | a0 = addr of cmd status reg + ori.l #RELOAD, (a0) | reload countdown + addq.l #1, SYM (Ttimer_val) | increment timer value + move.l (a7)+, a0 | restore a0 + rte + +END_CODE +END |