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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 12:08:42 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-04-20 13:52:19 +0200
commite0dd8a5ad830798bc8082b03b8c42c32fb9660e0 (patch)
treed147bfc4d670fcdfbd2e2d2e75eb209f92e07df1 /bsps/m68k/gen68360
parentbsps: Move startup files to bsps (diff)
downloadrtems-e0dd8a5ad830798bc8082b03b8c42c32fb9660e0.tar.bz2
bsps: Move benchmark timer to bsps
This patch is a part of the BSP source reorganization. Update #3285.
Diffstat (limited to 'bsps/m68k/gen68360')
-rw-r--r--bsps/m68k/gen68360/btimer/btimer.c83
1 files changed, 83 insertions, 0 deletions
diff --git a/bsps/m68k/gen68360/btimer/btimer.c b/bsps/m68k/gen68360/btimer/btimer.c
new file mode 100644
index 0000000000..40a3e0a4c1
--- /dev/null
+++ b/bsps/m68k/gen68360/btimer/btimer.c
@@ -0,0 +1,83 @@
+/*
+ * Use TIMER 1 and TIMER 2 for Timing Test Suite
+ * The hardware on the MC68360 makes these routines very simple.
+ *
+ * Based on the `gen68302' board support package, and covered by the
+ * original distribution terms.
+ *
+ * W. Eric Norum
+ * Saskatchewan Accelerator Laboratory
+ * University of Saskatchewan
+ * Saskatoon, Saskatchewan, CANADA
+ * eric@skatter.usask.ca
+ */
+
+/*
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * NOTE: It is important that the timer start/stop overhead be
+ * determined when porting or modifying this code.
+ *
+ * COPYRIGHT (c) 1989-1999.
+ * On-Line Applications Research Corporation (OAR).
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/btimer.h>
+#include <bsp.h>
+#include <rtems/m68k/m68360.h>
+
+void
+benchmark_timer_initialize (void)
+{
+ /*
+ * Reset timers 1 and 2
+ */
+ m360.tgcr &= ~0x00FF;
+ m360.tcn1 = 0;
+ m360.tcn2 = 0;
+ m360.ter1 = 0xFFFF;
+ m360.ter2 = 0xFFFF;
+
+ /*
+ * Cascade timers 1 and 2
+ */
+ m360.tgcr |= 0x0080;
+
+ /*
+ * Configure timers 1 and 2 to a single 32-bit, 1 MHz timer.
+ * HARDWARE:
+ * Change the `25' to match your processor clock
+ */
+ m360.tmr2 = ((25-1) << 8) | 0x2;
+ m360.tmr1 = 0;
+
+ /*
+ * Start the timers
+ */
+ m360.tgcr |= 0x0011;
+}
+
+/*
+ * Return timer value in microsecond units
+ */
+uint32_t
+benchmark_timer_read (void)
+{
+ unsigned short val;
+
+ val = m360.tcn1;
+ return val;
+}
+
+void
+benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
+{
+}