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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-22 13:00:27 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-23 09:24:49 +0100 |
| commit | 9f3a08ef2de99714d679aecf6b1ecb4e11869424 (patch) | |
| tree | 0d876016ae1dd067b1815dd79715cc7edc752f1e /bsps/include | |
| parent | bsps/arm: Invalidate TLB in start.S (diff) | |
| download | rtems-9f3a08ef2de99714d679aecf6b1ecb4e11869424.tar.bz2 | |
bsps: Use header file for GIC architecture support
This avoids a function call overhead in the interrupt dispatching.
Update #4202.
Diffstat (limited to 'bsps/include')
| -rw-r--r-- | bsps/include/dev/irq/arm-gic-irq.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h index 5270331624..5ce9d54684 100644 --- a/bsps/include/dev/irq/arm-gic-irq.h +++ b/bsps/include/dev/irq/arm-gic-irq.h @@ -97,19 +97,6 @@ static inline rtems_status_code arm_gic_irq_generate_software_irq( return sc; } -/** - * This architecture-specific function sets the exception vector for handling - * IRQs. - */ -void arm_interrupt_facility_set_exception_handler(void); - -/** - * This architecture-specific function dispatches a triggered IRQ. - * - * @param[in] vector The vector on which the IRQ occurred. - */ -void arm_interrupt_handler_dispatch(rtems_vector_number vector); - uint32_t arm_gic_irq_processor_count(void); void arm_gic_irq_initialize_secondary_cpu(void); |