diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-03-14 15:56:15 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-04-06 09:48:52 +0200 |
commit | 3026859d41fd824878e8f421ad897314d3474588 (patch) | |
tree | 39ead4f66cbc395e53628f7c0f6bcf20e6eeaea1 /bsps/include/dev | |
parent | bsps: Move gicv3_init_dist() (diff) | |
download | rtems-3026859d41fd824878e8f421ad897314d3474588.tar.bz2 |
bsps: Move gicv3_init_cpu_interface()
Make the processor index a parameter.
Diffstat (limited to 'bsps/include/dev')
-rw-r--r-- | bsps/include/dev/irq/arm-gicv3.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h index de15b5cc81..73ad05a507 100644 --- a/bsps/include/dev/irq/arm-gicv3.h +++ b/bsps/include/dev/irq/arm-gicv3.h @@ -279,6 +279,33 @@ static void gicv3_init_dist(volatile gic_dist *dist) } } +static void gicv3_init_cpu_interface(uint32_t cpu_index) +{ + uint32_t sre_value = 0x7; + WRITE_SR(ICC_SRE, sre_value); + WRITE_SR(ICC_PMR, GIC_CPUIF_ICCPMR_PRIORITY(0xff)); + WRITE_SR(ICC_BPR0, GIC_CPUIF_ICCBPR_BINARY_POINT(0x0)); + + volatile gic_redist *redist = gicv3_get_redist(cpu_index); + uint32_t waker = redist->icrwaker; + uint32_t waker_mask = GIC_REDIST_ICRWAKER_PROCESSOR_SLEEP; + waker &= ~waker_mask; + redist->icrwaker = waker; + + volatile gic_sgi_ppi *sgi_ppi = gicv3_get_sgi_ppi(cpu_index); + /* Set G1NS */ + sgi_ppi->icspigrpr[0] = 0xffffffff; + sgi_ppi->icspigrpmodr[0] = 0; + for (int id = 0; id < 32; id++) { + sgi_ppi->icspiprior[id] = PRIORITY_DEFAULT; + } + + /* Enable interrupt groups 0 and 1 */ + WRITE_SR(ICC_IGRPEN0, 0x1); + WRITE_SR(ICC_IGRPEN1, 0x1); + WRITE_SR(ICC_CTLR, 0x0); +} + #ifdef __cplusplus } #endif |