diff options
author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-03-14 15:54:37 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-04-06 09:48:52 +0200 |
commit | b3519336fd5a04dd52556fd655fdbb827585deed (patch) | |
tree | 3483c98dd2ce303d3ee6a9695715f6e85fcdcab1 /bsps/include/dev | |
parent | bsps: Add gicv3_sgi_ppi_disable() (diff) | |
download | rtems-b3519336fd5a04dd52556fd655fdbb827585deed.tar.bz2 |
bsps: Move gicv3_init_dist()
Make the distributor register block a parameter.
Diffstat (limited to 'bsps/include/dev')
-rw-r--r-- | bsps/include/dev/irq/arm-gicv3.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/bsps/include/dev/irq/arm-gicv3.h b/bsps/include/dev/irq/arm-gicv3.h index 37e0d433cc..de15b5cc81 100644 --- a/bsps/include/dev/irq/arm-gicv3.h +++ b/bsps/include/dev/irq/arm-gicv3.h @@ -242,6 +242,43 @@ static inline void gicv3_trigger_sgi( WRITE64_SR(ICC_SGI1, value); } +static inline uint32_t gicv3_get_id_count(volatile gic_dist *dist) +{ + uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr); + + id_count = 32 * (id_count + 1); + id_count = id_count <= 1020 ? id_count : 1020; + + return id_count; +} + +static void gicv3_init_dist(volatile gic_dist *dist) +{ + uint32_t id_count = gicv3_get_id_count(dist); + uint32_t id; + + dist->icddcr = GIC_DIST_ICDDCR_ARE_NS | GIC_DIST_ICDDCR_ARE_S + | GIC_DIST_ICDDCR_ENABLE_GRP1S | GIC_DIST_ICDDCR_ENABLE_GRP1NS + | GIC_DIST_ICDDCR_ENABLE_GRP0; + + for (id = 0; id < id_count; id += 32) { + /* Disable all interrupts */ + dist->icdicer[id / 32] = 0xffffffff; + + /* Set G1NS */ + dist->icdigr[id / 32] = 0xffffffff; + dist->icdigmr[id / 32] = 0; + } + + for (id = 0; id < id_count; ++id) { + gic_id_set_priority(dist, id, PRIORITY_DEFAULT); + } + + for (id = 32; id < id_count; ++id) { + gic_id_set_targets(dist, id, 0x01); + } +} + #ifdef __cplusplus } #endif |