diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-22 13:00:27 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-12-23 09:24:49 +0100 |
| commit | 9f3a08ef2de99714d679aecf6b1ecb4e11869424 (patch) | |
| tree | 0d876016ae1dd067b1815dd79715cc7edc752f1e /bsps/arm | |
| parent | bsps/arm: Invalidate TLB in start.S (diff) | |
| download | rtems-9f3a08ef2de99714d679aecf6b1ecb4e11869424.tar.bz2 | |
bsps: Use header file for GIC architecture support
This avoids a function call overhead in the interrupt dispatching.
Update #4202.
Diffstat (limited to 'bsps/arm')
| -rw-r--r-- | bsps/arm/include/dev/irq/arm-gic-arch.h (renamed from bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c) | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c b/bsps/arm/include/dev/irq/arm-gic-arch.h index 7c0462d04d..fe981da4f7 100644 --- a/bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c +++ b/bsps/arm/include/dev/irq/arm-gic-arch.h @@ -34,12 +34,18 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef _RTEMS_DEV_IRQ_ARM_GIC_ARM_H +#define _RTEMS_DEV_IRQ_ARM_GIC_ARM_H + #include <libcpu/arm-cp15.h> -#include <dev/irq/arm-gic-irq.h> #include <bsp/irq-generic.h> #include <rtems/score/armv4.h> -void arm_interrupt_handler_dispatch(rtems_vector_number vector) +#ifdef __cplusplus +extern "C" { +#endif + +static inline void arm_interrupt_handler_dispatch(rtems_vector_number vector) { uint32_t psr = _ARMV4_Status_irq_enable(); bsp_interrupt_handler_dispatch(vector); @@ -47,10 +53,16 @@ void arm_interrupt_handler_dispatch(rtems_vector_number vector) _ARMV4_Status_restore(psr); } -void arm_interrupt_facility_set_exception_handler(void) +static inline void arm_interrupt_facility_set_exception_handler(void) { arm_cp15_set_exception_handler( ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt ); } + +#ifdef __cplusplus +} +#endif + +#endif /* _RTEMS_DEV_IRQ_ARM_GIC_ARM_H */ |