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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /bsps/arm/rtl22xx/include/bsp.h
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'bsps/arm/rtl22xx/include/bsp.h')
-rw-r--r--bsps/arm/rtl22xx/include/bsp.h226
1 files changed, 226 insertions, 0 deletions
diff --git a/bsps/arm/rtl22xx/include/bsp.h b/bsps/arm/rtl22xx/include/bsp.h
new file mode 100644
index 0000000000..9b376daf0d
--- /dev/null
+++ b/bsps/arm/rtl22xx/include/bsp.h
@@ -0,0 +1,226 @@
+/**
+ * @file
+ * @ingroup arm_rtl22xx
+ * @brief Global BSP definitions.
+ */
+
+/*
+ * Philips LPC22XX/LPC21xx BSP header file
+ *
+ * by Ray,Xu <Rayx.cn@gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+*/
+#ifndef LIBBSP_ARM_RTL22XX_BSP_H
+#define LIBBSP_ARM_RTL22XX_BSP_H
+
+#include <bspopts.h>
+#include <bsp/default-initial-extension.h>
+
+/**
+ * @defgroup arm_rtl22xx RTL22XX Support
+ * @ingroup bsp_arm
+ * @brief RTL22XX Support Package
+ * @{
+ */
+
+#include <rtems.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BSP_FEATURE_IRQ_EXTENSION
+
+#define CONFIG_ARM_CLK 60000000L
+/* cclk=cco/(2*P) */
+/* cco = cclk*2*P */
+
+/** @brief system clk frequecy,<=60Mhz, defined in system configuration */
+#define LPC22xx_Fcclk CONFIG_ARM_CLK
+
+/* Fcco 156M~320Mhz*/
+/** @brief system clk frequecy,<=60Mhz, defined in system configuration */
+#define LPC22xx_Fcclk CONFIG_ARM_CLK
+#define LPC22xx_Fcco LPC22xx_Fcclk * 4
+/** @brief VPB clk frequency,1,1/2,1/4 times of Fcclk */
+#define LPC22xx_Fpclk (LPC22xx_Fcclk /4) *1
+
+
+
+/**
+ * @name Fcclk range: 10MHz ~ MCU allowed frequency
+ * @{
+ */
+
+#define Fcclk_MIN 10000000L
+#define Fcclk_MAX 60000000L
+
+/** @} */
+
+/**
+ * @name Fcco range: 156MHz ~ 320MHz
+ * @{
+ */
+
+#define Fcco_MIN 156000000L
+#define Fcco_MAX 320000000L
+
+/** @} */
+
+#define PLLFEED_DATA1 0xAA
+#define PLLFEED_DATA2 0x55
+
+/**
+ * @name PLL PLLCON register bit descriptions
+ * @{
+ */
+
+#define PLLCON_ENABLE_BIT 0
+#define PLLCON_CONNECT_BIT 1
+
+/** @} */
+
+/**
+ * @name PLL PLLSTAT register bit descriptions
+ * @{
+ */
+
+#define PLLSTAT_ENABLE_BIT 8
+#define PLLSTAT_CONNECT_BIT 9
+#define PLLSTAT_LOCK_BIT 10
+
+/** @} */
+
+/**
+ * @name PM Peripheral Type
+ * @{
+ */
+
+#define PC_TIMER0 0x2
+#define PC_TIMER1 0x4
+#define PC_UART0 0x8
+#define PC_UART1 0x10
+#define PC_PWM0 0x20
+#define PC_I2C 0x80
+#define PC_SPI0 0x100
+#define PC_RTC 0x200
+
+/** @} */
+
+/** @brief OSC [Hz] */
+#define FOSC 11059200
+/** @brief Core clk [Hz] */
+#define FCCLK FOSC<<2
+
+/**
+ * @name System Configure
+ * @{
+ */
+
+/** @brief osc freq,10MHz~25MHz, change to a real one if needed */
+#define Fosc 11059200
+/** @brief system freq 2^n time of Fosc(1~32) <=60MHZ */
+#define Fcclk (Fosc << 2)
+/** @brief CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz */
+#define Fcco (Fcclk <<2)
+/** @brief VPB freq only(Fcclk / 4) 1~4 */
+#define Fpclk (Fcclk >>2) * 1
+/* This was M. That is a BAD BAD public constant. I renamed it to
+ * JOEL_M so it wouldn't conflict with user code. If you can find
+ * a better name, fix this. But nothing I found uses it.
+ */
+
+/** @} */
+
+#define JOEL_M Fcclk / Fosc
+#define P_min Fcco_MIN / (2*Fcclk) + 1;
+#define P_max Fcco_MAX / (2*Fcclk);
+
+#define UART_BPS 115200
+
+/** @brief Time Precision time [us] */
+#define TIMER_PRECISION 10
+
+/** @brief I2C Speed [bit/s] */
+#define I2CSPEED 20000 // 20 Kbit/s
+
+/**
+ * @name Uarts buffers size
+ * @{
+ */
+
+#define RXBUFSIZE 32
+#define TXBUFSIZE 32
+
+/** @} */
+
+/** @brief SPI Speed [bit/s] */
+#define SPISPEED 1500000 // 1.5 Mbit/s
+/** @brief SPI EEPROM CS pin
+ *
+ * (SSEL is not suitable for CS, because is used by SPI module for multi master SPI interface)
+ */
+#define SPI_CS_PIN P0_13
+#define SPI_CS_PIN_FUNC PINSEL0_bit.SPI_CS_PIN
+
+/**
+ * @name Flash definition
+ * @{
+ */
+
+//#define RTL22XX_FLASH_SIZE (0x200000-RTL22XX_FLASH_BOOT) // Total area of Flash region in words 8 bit
+/** @brief Total area of Flash region in words 8 bit */
+#define RTL22XX_FLASH_SIZE (0x80000-RTL22XX_FLASH_BOOT)
+//#define RTL22XX_FLASH_SIZE (0x80000-RTL22XX_FLASH_BOOT) // Total area of Flash region in words 8 bit
+#define RTL22XX_FLASH_BEGIN 0x80000000
+/** @brief First 0x8000 bytes reserved for boot loader etc. */
+#define RTL22XX_FLASH_BASE (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT)
+
+/** @} */
+
+/**
+ * @name SRAM definition
+ * @{
+ */
+
+/** @brief Total area of Flash region in words 8 bit */
+#define SRAM_SIZE 0x100000
+/** @brief First 0x8000 bytes reserved for boot loader etc. */
+#define SRAM_BASE 0x81000000
+
+/** @} */
+
+/** @brief CS8900A definition */
+#define CS8900A_BASE 0x82000000
+/** @brief RTL8019AS definition */
+#define RTL8019AS_BASE 0x82000000
+
+struct rtems_bsdnet_ifconfig;
+int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
+ int attaching);
+
+/**
+ * @name Network driver configuration
+ * @{
+ */
+
+#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
+#define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach
+
+/** @} */
+
+/*
+ * Prototypes for methods used across file boundaries in the BSP.
+ */
+extern void UART0_Ini(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _BSP_H */