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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-21 10:22:08 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-04-23 15:18:42 +0200 |
commit | adb85dd473af5c9a72e9da9b7fe013d1b216abc3 (patch) | |
tree | ed54d2ce2354cf2b75995d1e1f2bc685436bc4ca /bsps/arm/lpc32xx | |
parent | bsps: Remove AC_CONFIG_SRCDIR() (diff) | |
download | rtems-adb85dd473af5c9a72e9da9b7fe013d1b216abc3.tar.bz2 |
bsps: Move make/custom/* files to bsps
Adjust various build files. Remove automatic generation of the
c/src/lib/libbsp/*/acinclude.m4 files from bootstrap script.
This patch is a part of the BSP source reorganization.
Update #3285.
Diffstat (limited to 'bsps/arm/lpc32xx')
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx.inc | 14 | ||||
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg | 5 | ||||
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg | 20 | ||||
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg | 7 | ||||
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg | 5 | ||||
-rw-r--r-- | bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg | 5 |
6 files changed, 56 insertions, 0 deletions
diff --git a/bsps/arm/lpc32xx/config/lpc32xx.inc b/bsps/arm/lpc32xx/config/lpc32xx.inc new file mode 100644 index 0000000000..f184741242 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx.inc @@ -0,0 +1,14 @@ +# +# Config file for LPC32XX. +# + +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mcpu=arm926ej-s -mthumb + +CFLAGS_OPTIMIZE_V ?= -O2 -g +CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections + +LDFLAGS = -Wl,--gc-sections diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg new file mode 100644 index 0000000000..343fddef67 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx.cfg @@ -0,0 +1,5 @@ +# +# Config file for MZX application. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg new file mode 100644 index 0000000000..225ee5dc49 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1-testsuite.tcfg @@ -0,0 +1,20 @@ +# +# lpc32xx_mzx_stage_1 RTEMS Test Database. +# +# Format is one line per test that is _NOT_ built. +# + +include: testdata/disable-iconv-tests.tcfg +include: testdata/disable-jffs2-tests.tcfg + +exclude: dl05 +exclude: fileio +exclude: ftp01 +exclude: fsdosfsname01 +exclude: iostream +exclude: linpack +exclude: mghttpd01 +exclude: monitor02 +exclude: pppd +exclude: rtems++ +exclude: utf8proc01 diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg new file mode 100644 index 0000000000..b3838ab904 --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_1.cfg @@ -0,0 +1,7 @@ +# +# Config file for MZX stage-1 program. +# + +CFLAGS_OPTIMIZE_V = -Os -g + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg new file mode 100644 index 0000000000..586ddbec9c --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_mzx_stage_2.cfg @@ -0,0 +1,5 @@ +# +# Config file for MZX stage-2 program. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc diff --git a/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg b/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg new file mode 100644 index 0000000000..5c5c56734e --- /dev/null +++ b/bsps/arm/lpc32xx/config/lpc32xx_phycore.cfg @@ -0,0 +1,5 @@ +# +# Config file for Phycore LPC3250 board. +# + +include $(RTEMS_ROOT)/make/custom/lpc32xx.inc |