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authorChris Johns <chrisj@rtems.org>2017-12-23 18:18:56 +1100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-01-25 08:45:26 +0100
commit2afb22b7e1ebcbe40373ff7e0efae7d207c655a9 (patch)
tree44759efe9374f13200a97e96d91bd9a2b7e5ce2a /bsps/arm/lpc176x/include/bsp/lpc-gpio.h
parentMAINTAINERS: Add myself to Write After Approval. (diff)
downloadrtems-2afb22b7e1ebcbe40373ff7e0efae7d207c655a9.tar.bz2
Remove make preinstall
A speciality of the RTEMS build system was the make preinstall step. It copied header files from arbitrary locations into the build tree. The header files were included via the -Bsome/build/tree/path GCC command line option. This has at least seven problems: * The make preinstall step itself needs time and disk space. * Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error. * There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult. * The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit. * An introduction of a new build system is difficult. * Include paths specified by the -B option are system headers. This may suppress warnings. * The parallel build had sporadic failures on some hosts. This patch removes the make preinstall step. All installed header files are moved to dedicated include directories in the source tree. Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc, etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g. erc32, imx, qoriq, etc. The new cpukit include directories are: * cpukit/include * cpukit/score/cpu/@RTEMS_CPU@/include * cpukit/libnetworking The new BSP include directories are: * bsps/include * bsps/@RTEMS_CPU@/include * bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include There are build tree include directories for generated files. The include directory order favours the most general header file, e.g. it is not possible to override general header files via the include path order. The "bootstrap -p" option was removed. The new "bootstrap -H" option should be used to regenerate the "headers.am" files. Update #3254.
Diffstat (limited to 'bsps/arm/lpc176x/include/bsp/lpc-gpio.h')
-rw-r--r--bsps/arm/lpc176x/include/bsp/lpc-gpio.h100
1 files changed, 100 insertions, 0 deletions
diff --git a/bsps/arm/lpc176x/include/bsp/lpc-gpio.h b/bsps/arm/lpc176x/include/bsp/lpc-gpio.h
new file mode 100644
index 0000000000..9cb23df142
--- /dev/null
+++ b/bsps/arm/lpc176x/include/bsp/lpc-gpio.h
@@ -0,0 +1,100 @@
+/**
+ * @file lpc-gpio.h
+ *
+ * @ingroup lpc176x
+ *
+ * @brief API of the GPIO driver for the lpc176x bsp in RTEMS.
+ */
+
+/*
+ * Copyright (c) 2014 Taller Technologies.
+ *
+ * @author Boretto Martin (martin.boretto@tallertechnologies.com)
+ * @author Diaz Marcos (marcos.diaz@tallertechnologies.com)
+ * @author Lenarduzzi Federico (federico.lenarduzzi@tallertechnologies.com)
+ * @author Daniel Chicco (daniel.chicco@tallertechnologies.com)
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_LPC176X_GPIO_H
+#define LIBBSP_ARM_LPC176X_GPIO_H
+
+#include <bsp/lpc176x.h>
+#include <bsp/gpio-defs.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/**
+ * @brief Configures the pin as input or output GPIO.
+ *
+ * @param pin The pin to configure
+ * @param dir Input or output.
+ */
+rtems_status_code lpc176x_gpio_config(
+ lpc176x_pin_number pin,
+ lpc176x_gpio_direction dir
+);
+
+/**
+ * @brief Configures the pin as input, enables interrupt for an
+ * edge/s and sets isrfunct as the function to call when that
+ * interrupt occurs.
+ *
+ * @param pin The pin to configure.
+ * @param edge Which edge or edges will activate the interrupt.
+ * @param isrfunct The function that is called when the interrupt occurs.
+ * @return RTEMS_SUCCESSFULL if the configurations was success.
+ */
+rtems_status_code lpc176x_gpio_config_input_with_interrupt(
+ lpc176x_pin_number pin,
+ lpc176x_gpio_interrupt edge,
+ lpc176x_gpio_interrupt_function isrfunct
+);
+
+/**
+ * @brief Sets the output pin to 1.
+ *
+ * @param pin The pin to set
+ */
+rtems_status_code lpc176x_gpio_set_pin( lpc176x_pin_number pin );
+
+/**
+ * @brief Sets the output pin to 0.
+ *
+ * @param pin The pin to set
+ */
+rtems_status_code lpc176x_gpio_clear_pin( lpc176x_pin_number pin );
+
+/**
+ * @brief Sets the output pin to 0 or 1 according to value.
+ *
+ * @param pin The pin to set
+ * @param value the value to set.
+ */
+rtems_status_code lpc176x_gpio_write_pin(
+ lpc176x_pin_number pin,
+ bool value
+);
+
+/**
+ * @brief Returns the value at the given input pin.
+ *
+ * @param pin The pin where to read the value.
+ * @param pin_value TRUE if the pin value was getted successfuly.
+ * @return RTEMS_SUCCESSFUL if the pin value was getted successfuly.
+ */
+rtems_status_code lpc176x_gpio_get_pin_value(
+ lpc176x_pin_number pin,
+ bool *pin_value
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_LPC176X_GPIO_H */