Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

1 files changed, 187 insertions, 0 deletions

diff --git a/bsps/arm/include/bsp/arm-cp15-start.h b/bsps/arm/include/bsp/arm-cp15-start.h
new file mode 100644
index 0000000000..a749f7dc98
--- /dev/null
+++ b/bsps/arm/include/bsp/arm-cp15-start.h
@@ -0,0 +1,187 @@
+/**
+ * @file
+ *
+ * @ingroup arm_start
+ *
+ * @brief Arm CP15 start.
+ */
+
+
+/*
+ * Copyright (c) 2013 Hesham AL-Matary.
+ * Copyright (c) 2009-2014 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_SHARED_ARM_CP15_START_H
+#define LIBBSP_ARM_SHARED_ARM_CP15_START_H
+
+#include <libcpu/arm-cp15.h>
+#include <bsp/start.h>
+#include <bsp/linker-symbols.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct {
+  uint32_t begin;
+  uint32_t end;
+  uint32_t flags;
+} arm_cp15_start_section_config;
+
+#define ARMV7_CP15_START_DEFAULT_SECTIONS \
+  { \
+    .begin = (uint32_t) bsp_section_fast_text_begin, \
+    .end = (uint32_t) bsp_section_fast_text_end, \
+    .flags = ARMV7_MMU_CODE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_fast_data_begin, \
+    .end = (uint32_t) bsp_section_fast_data_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_start_begin, \
+    .end = (uint32_t) bsp_section_start_end, \
+    .flags = ARMV7_MMU_CODE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_vector_begin, \
+    .end = (uint32_t) bsp_section_vector_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_text_begin, \
+    .end = (uint32_t) bsp_section_text_end, \
+    .flags = ARMV7_MMU_CODE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_rodata_begin, \
+    .end = (uint32_t) bsp_section_rodata_end, \
+    .flags = ARMV7_MMU_DATA_READ_ONLY_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_data_begin, \
+    .end = (uint32_t) bsp_section_data_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_bss_begin, \
+    .end = (uint32_t) bsp_section_bss_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_work_begin, \
+    .end = (uint32_t) bsp_section_work_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_stack_begin, \
+    .end = (uint32_t) bsp_section_stack_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }, { \
+    .begin = (uint32_t) bsp_section_nocache_begin, \
+    .end = (uint32_t) bsp_section_nocache_end, \
+    .flags = ARMV7_MMU_DEVICE \
+  }, { \
+    .begin = (uint32_t) bsp_section_nocachenoload_begin, \
+    .end = (uint32_t) bsp_section_nocachenoload_end, \
+    .flags = ARMV7_MMU_DEVICE \
+  }, { \
+    .begin = (uint32_t) bsp_translation_table_base, \
+    .end = (uint32_t) bsp_translation_table_end, \
+    .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED \
+  }
+
+BSP_START_DATA_SECTION extern const arm_cp15_start_section_config
+  arm_cp15_start_mmu_config_table[];
+
+BSP_START_DATA_SECTION extern const size_t
+  arm_cp15_start_mmu_config_table_size;
+
+BSP_START_TEXT_SECTION static inline void
+arm_cp15_start_set_translation_table_entries(
+  uint32_t *ttb,
+  const arm_cp15_start_section_config *config
+)
+{
+  uint32_t i = ARM_MMU_SECT_GET_INDEX(config->begin);
+  uint32_t iend =
+    ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(config->end));
+  uint32_t index_mask = (1U << (32 - ARM_MMU_SECT_BASE_SHIFT)) - 1U;
+
+  if (config->begin != config->end) {
+    while (i != iend) {
+      ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | config->flags;
+      i = (i + 1U) & index_mask;
+    }
+  }
+}
+
+BSP_START_TEXT_SECTION static inline void
+arm_cp15_start_setup_translation_table(
+  uint32_t *ttb,
+  uint32_t client_domain,
+  const arm_cp15_start_section_config *config_table,
+  size_t config_count
+)
+{
+  uint32_t dac = ARM_CP15_DAC_DOMAIN(client_domain, ARM_CP15_DAC_CLIENT);
+  size_t i;
+
+  arm_cp15_set_domain_access_control(dac);
+  arm_cp15_set_translation_table_base(ttb);
+
+  /* Initialize translation table with invalid entries */
+  for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
+    ttb [i] = 0;
+  }
+
+  for (i = 0; i < config_count; ++i) {
+    arm_cp15_start_set_translation_table_entries(ttb, &config_table [i]);
+  }
+}
+
+BSP_START_TEXT_SECTION static inline void
+arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
+  uint32_t ctrl,
+  uint32_t *ttb,
+  uint32_t client_domain,
+  const arm_cp15_start_section_config *config_table,
+  size_t config_count
+)
+{
+  arm_cp15_start_setup_translation_table(
+    ttb,
+    client_domain,
+    config_table,
+    config_count
+  );
+
+  /* Enable MMU and cache */
+  ctrl |= ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M;
+
+  arm_cp15_set_control(ctrl);
+}
+
+BSP_START_TEXT_SECTION static inline uint32_t
+arm_cp15_start_setup_mmu_and_cache(uint32_t ctrl_clear, uint32_t ctrl_set)
+{
+  uint32_t ctrl = arm_cp15_get_control();
+
+  ctrl &= ~ctrl_clear;
+  ctrl |= ctrl_set;
+
+  arm_cp15_set_control(ctrl);
+
+  arm_cp15_tlb_invalidate();
+
+  return ctrl;
+}
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_SHARED_ARM_CP15_START_H */