diff options
| author | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2023-04-12 17:34:31 +0200 |
|---|---|---|
| committer | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2023-07-24 14:41:06 +0200 |
| commit | 4a3ace7c7a464409cc5da859a04e2d3ba533b69a (patch) | |
| tree | 978793787e4550ee92f97dcbacc5bbea52492d2c /bsps/arm/imxrt/start | |
| parent | bsps/imsrt: Make flash config more flexible (diff) | |
| download | rtems-4a3ace7c7a464409cc5da859a04e2d3ba533b69a.tar.bz2 | |
bsps/imxrt: Add imxrt1166_cm7_saltshaker BSP
The BSP is for a custom i.MXRT1166 based board. At the moment, only the
cortex M7 is supported.
Diffstat (limited to 'bsps/arm/imxrt/start')
| -rw-r--r-- | bsps/arm/imxrt/start/bspstart.c | 23 | ||||
| -rw-r--r-- | bsps/arm/imxrt/start/bspstarthooks.c | 4 | ||||
| -rw-r--r-- | bsps/arm/imxrt/start/imxrt-ffec-init.c | 4 |
3 files changed, 28 insertions, 3 deletions
diff --git a/bsps/arm/imxrt/start/bspstart.c b/bsps/arm/imxrt/start/bspstart.c index 7398ffbe73..1d583d7ca4 100644 --- a/bsps/arm/imxrt/start/bspstart.c +++ b/bsps/arm/imxrt/start/bspstart.c @@ -59,6 +59,13 @@ static void imxrt_disable_wait_mode(void) * every WFI. */ CLOCK_SetMode(kCLOCK_ModeRun); +#elif IMXRT_IS_MIMXRT11xx + /* + * i.MX RT11xx doesn't support disabling power saving for WFI. On the other + * hand it doesn't have a separate interrupt controller like the i.MX RT1050. + * So a power save during WFI is only annoying during debugging but doesn't + * hurt otherwise. + */ #else #error Disabling wait mode not implemented for this chip. #endif @@ -129,6 +136,22 @@ uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells) return intr[0]; } +/* + * Clock frequencies for peripherals like SD card. These are used by libbsd + * drivers. + */ +#if IMXRT_IS_MIMXRT11xx +uint32_t +imx_ccm_sdhci_hz(void) +{ + /* + * We don't know which SDHCI is used. So just return the clock frequency + * of the first SDHCI and hope the best. + */ + return CLOCK_GetRootClockFreq(kCLOCK_Root_Usdhc1); +} +#endif + /* Make sure to pull in the flash headers */ __attribute__((used)) static const void *hdr_dcd = &imxrt_dcd_data; __attribute__((used)) static const void *hdr_ivt = &imxrt_image_vector_table; diff --git a/bsps/arm/imxrt/start/bspstarthooks.c b/bsps/arm/imxrt/start/bspstarthooks.c index 4814373641..c10d0dbcfe 100644 --- a/bsps/arm/imxrt/start/bspstarthooks.c +++ b/bsps/arm/imxrt/start/bspstarthooks.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-2-Clause */ /* - * Copyright (C) 2013, 2018 embedded brains GmbH & Co. KG + * Copyright (c) 2013-2023 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,8 +35,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void) { - /* FIXME: Initializing SDRAM is currently done by DCD. It would be more user - * friendly if that would be done here with a readable structure. */ if ((SCB->CCR & SCB_CCR_IC_Msk) == 0) { SCB_EnableICache(); } diff --git a/bsps/arm/imxrt/start/imxrt-ffec-init.c b/bsps/arm/imxrt/start/imxrt-ffec-init.c index 5cdcfcdab8..c0a8e168e3 100644 --- a/bsps/arm/imxrt/start/imxrt-ffec-init.c +++ b/bsps/arm/imxrt/start/imxrt-ffec-init.c @@ -41,6 +41,7 @@ void imxrt_ffec_init(void) fdt = bsp_fdt_get(); +#if IMXRT_IS_MIMXRT10xx const clock_enet_pll_config_t config = { .enableClkOutput = true, .enableClkOutput25M = false, @@ -50,6 +51,9 @@ void imxrt_ffec_init(void) CLOCK_InitEnetPll(&config); iomuxc_gpr->GPR1 |= IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK; +#else + iomuxc_gpr->GPR4 |= IOMUXC_GPR_GPR4_ENET_REF_CLK_DIR_MASK; +#endif node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imxrt-fec"); if (node >= 0) { |