Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>.  Place the
interrupt stack area in a special section ".rtemsstack.interrupt".  Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures.  There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack().  Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  * interrupts are disabled during the sequential system initialization,
    and

  * the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  * Mostly replace the linker symbol based configuration of stacks with
    the standard <rtems/confdefs.h> configuration via
    CONFIGURE_INTERRUPT_STACK_SIZE.  The size of the FIQ, ABT and UND
    mode stack is still defined via linker symbols.  These modes are
    rarely used in applications and the default values provided by the
    BSP should be sufficient in most cases.

  * Remove the bsp_processor_count linker symbol hack used for the SMP
    support. This is possible since the interrupt stack area is now
    allocated by the linker and not allocated from the heap.  This makes
    some configure.ac stuff obsolete.  Remove the now superfluous BSP
    variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  * Remove unused magic linker command file allocation of initialization
    stack.  Maybe a previous linker command file copy and paste problem?
    In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

m68k:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

powerpc:

  * Remove magic linker command file allocation of initialization stack.
    Reuse interrupt stack for initialization stack.

  * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt
    stack on BSPs using the shared linkcmds.base (replacement for
    REGION_RWEXTRA).

sparc:

  * Remove the hard coded initialization stack.  Use the interrupt stack
    for the initialization stack on the boot processor.  This saves
    16KiB of RAM.

Update #3459.

1 files changed, 40 insertions, 58 deletions

diff --git a/bsps/arm/edb7312/start/start.S b/bsps/arm/edb7312/start/start.S
index e03707bfcf..5806d41ce4 100644
--- a/bsps/arm/edb7312/start/start.S
+++ b/bsps/arm/edb7312/start/start.S
@@ -12,21 +12,8 @@
  *  http://www.rtems.org/license/LICENSE.
 */
 
-#include <bsp/linker-symbols.h>
-
-/* Some standard definitions...*/
-
-.equ Mode_USR,        	     0x10
-.equ Mode_FIQ,        	     0x11
-.equ Mode_IRQ,        	     0x12
-.equ Mode_SVC,        	     0x13
-.equ Mode_ABT,        	     0x17
-.equ Mode_ABORT,             0x17
-.equ Mode_UNDEF,      	     0x1B
-.equ Mode_SYS,        	     0x1F /*only available on ARM Arch. v4*/
-
-.equ I_Bit,           	     0x80
-.equ F_Bit,           	     0x40
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
 
 .section ".bsp_start_text", "ax"
 .arm
@@ -72,8 +59,44 @@ handler_addr_fiq:
 
 	.globl	_start
 _start:
-	/* store the sp */
-	mov	r12, sp
+        /* Set end of interrupt stack area */
+        ldr     r7, =_Configuration_Interrupt_stack_area_end
+
+        /* Enter FIQ mode and set up the FIQ stack pointer */
+        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
+        msr     cpsr, r0
+        ldr     r1, =bsp_stack_fiq_size
+        mov     sp, r7
+        sub     r7, r7, r1
+
+        /* Enter ABT mode and set up the ABT stack pointer */
+        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
+        msr     cpsr, r0
+        ldr     r1, =bsp_stack_abt_size
+        mov     sp, r7
+        sub     r7, r7, r1
+
+        /* Enter UND mode and set up the UND stack pointer */
+        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
+        msr     cpsr, r0
+        ldr     r1, =bsp_stack_und_size
+        mov     sp, r7
+        sub     r7, r7, r1
+
+        /* Enter IRQ mode and set up the IRQ stack pointer */
+        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
+        msr     cpsr, r0
+        mov     sp, r7
+
+        /*
+         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
+         * (interrupts are disabled).
+         */
+        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
+        msr     cpsr, r0
+        mov     sp, r7
+
+        /* Stay in SVC mode */
 /*
  * Here is the code to initialize the low-level BSP environment
  * (Chip Select, PLL, ....?)
@@ -89,48 +112,7 @@ zi_init:
         STRLOT   r2, [r0], #4
         BLO     zi_init
 
-/* --- Initialise stack pointer registers */
-
-/* Enter IRQ mode and set up the IRQ stack pointer */
-    MOV     r0, #Mode_IRQ | I_Bit | F_Bit     /* No interrupts */
-    MSR     cpsr, r0
-    ldr	    r1, =bsp_stack_irq_size
-    LDR     sp, =bsp_stack_irq_begin
-    add	    sp, sp, r1
-    sub     sp, sp, #0x64
-
-/* Enter FIQ mode and set up the FIQ stack pointer */
-    MOV     r0, #Mode_FIQ | I_Bit | F_Bit     /* No interrupts */
-    MSR     cpsr, r0
-    ldr	    r1, =bsp_stack_fiq_size
-    LDR     sp, =bsp_stack_fiq_begin
-    add	    sp, sp, r1
-    sub     sp, sp, #0x64
-
-/* Enter ABT mode and set up the ABT stack pointer */
-    MOV     r0, #Mode_ABT | I_Bit | F_Bit     /* No interrupts */
-    MSR     cpsr, r0
-    ldr	    r1, =bsp_stack_abt_size
-    LDR     sp, =bsp_stack_abt_begin
-    add	    sp, sp, r1
-    sub     sp, sp, #0x64
-
-/* Set up the SVC stack pointer last and stay in SVC mode */
-    MOV     r0, #Mode_SVC | I_Bit | F_Bit     /* No interrupts */
-    MSR     cpsr, r0
-    ldr	    r1, =bsp_stack_svc_size
-    LDR     sp, =bsp_stack_svc_begin
-    add	    sp, sp, r1
-    sub     sp, sp, #0x64
-
-	/* save the original registers */
-	stmdb	sp!, {r4-r12, lr}
-
 /* --- Now we enter the C code */
 
 	mov     r0, #0
 	bl	boot_card
-
-	ldmia	sp!, {r4-r12, lr}
-	mov	sp, r12
-	mov	pc, lr