Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step.  It
copied header files from arbitrary locations into the build tree.  The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

* The make preinstall step itself needs time and disk space.

* Errors in header files show up in the build tree copy.  This makes it
  hard for editors to open the right file to fix the error.

* There is no clear relationship between source and build tree header
  files.  This makes an audit of the build process difficult.

* The visibility of all header files in the build tree makes it
  difficult to enforce API barriers.  For example it is discouraged to
  use BSP-specifics in the cpukit.

* An introduction of a new build system is difficult.

* Include paths specified by the -B option are system headers.  This
  may suppress warnings.

* The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step.   All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc.  Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

* cpukit/include

* cpukit/score/cpu/@RTEMS_CPU@/include

* cpukit/libnetworking

The new BSP include directories are:

* bsps/include

* bsps/@RTEMS_CPU@/include

* bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed.  The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

9 files changed, 623 insertions, 0 deletions

diff --git a/bsps/arm/atsam/include/bsp/atsam-clock-config.h b/bsps/arm/atsam/include/bsp/atsam-clock-config.h
new file mode 100644
index 0000000000..396986894b
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/atsam-clock-config.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2017 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef ATSAM_CLOCK_CONFIG_H
+#define ATSAM_CLOCK_CONFIG_H
+
+#include <rtems.h>
+#include <bsp/linker-symbols.h>
+#include <bspopts.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#if ATSAM_CHANGE_CLOCK_FROM_SRAM != 0
+/* Note: fast_text is the simplest section to put this code into. Other
+ * possibilities would include creating a new section. */
+#define ATSAM_START_SRAM_SECTION BSP_FAST_TEXT_SECTION
+#else
+#define ATSAM_START_SRAM_SECTION
+#endif
+
+struct atsam_clock_config {
+  /* Initialization value for the PMC_PLLAR. */
+  uint32_t pllar_init;
+  /* Initialization value for the PMC_MCKR. */
+  uint32_t mckr_init;
+  /* Resulting frequency in Hz. */
+  uint32_t mck_freq;
+};
+
+ATSAM_START_SRAM_SECTION
+extern const struct atsam_clock_config atsam_clock_config;
+
+#define BOARD_MCK (atsam_clock_config.mck_freq)
+
+struct BOARD_Sdram_Config {
+  uint32_t sdramc_tr;
+  uint32_t sdramc_cr;
+  uint32_t sdramc_mdr;
+  uint32_t sdramc_cfr1;
+};
+
+ATSAM_START_SRAM_SECTION
+extern const struct BOARD_Sdram_Config BOARD_Sdram_Config;
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* ATSAM_CLOCK_CONFIG_H */
diff --git a/bsps/arm/atsam/include/bsp/atsam-i2c.h b/bsps/arm/atsam/include/bsp/atsam-i2c.h
new file mode 100644
index 0000000000..7425db9f7b
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/atsam-i2c.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_ATSAM_I2C_H
+#define LIBBSP_ARM_ATSAM_ATSAM_I2C_H
+
+#include <libchip/chip.h>
+#include <libchip/include/pio.h>
+
+#include <bsp.h>
+#include <dev/i2c/i2c.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define TWI_AMOUNT_PINS 2
+
+typedef enum {
+	TX_SEND_DATA,
+	TX_SEND_STOP,
+	TX_CONT_MESSAGE_NEEDED,
+	RX_SEND_DATA,
+	RX_SEND_STOP,
+	RX_CONT_MESSAGE_NEEDED,
+	TX_RX_STOP_SENT
+}transfer_state;
+
+typedef struct {
+	uint8_t status;
+	uint8_t *data;
+	bool stop_request;
+	uint32_t data_size;
+	uint32_t already_transferred;
+	transfer_state trans_state;
+} transfer_desc;
+
+typedef struct {
+	i2c_bus base;
+	i2c_msg *msgs;
+	Twihs *regs;
+	transfer_desc trans_desc;
+	uint32_t msg_todo;
+	uint32_t current_msg_todo;
+	uint8_t *current_msg_byte;
+	uint32_t input_clock;
+	bool read;
+	rtems_id task_id;
+	rtems_vector_number irq;
+} atsam_i2c_bus;
+
+int i2c_bus_register_atsam(
+    const char *bus_path,
+    Twihs *register_base,
+    rtems_vector_number irq,
+    const Pin pins[TWI_AMOUNT_PINS]
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_ATSAM_I2C_H */
diff --git a/bsps/arm/atsam/include/bsp/atsam-spi.h b/bsps/arm/atsam/include/bsp/atsam-spi.h
new file mode 100644
index 0000000000..548dd544f4
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/atsam-spi.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_ATSAM_SPI_H
+#define LIBBSP_ARM_ATSAM_ATSAM_SPI_H
+
+#include <libchip/chip.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+int spi_bus_register_atsam(
+  const char *bus_path,
+  uint8_t     spi_peripheral_id,
+  Spi        *spi_regs,
+  const Pin  *pins,
+  size_t      pin_count
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_ATSAM_SPI_H */
diff --git a/bsps/arm/atsam/include/bsp/i2c.h b/bsps/arm/atsam/include/bsp/i2c.h
new file mode 100644
index 0000000000..1ea1204ff5
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/i2c.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_I2C_H
+#define LIBBSP_ARM_ATSAM_I2C_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define ATSAM_I2C_0_BUS_PATH "/dev/i2c-0"
+#define ATSAM_I2C_1_BUS_PATH "/dev/i2c-1"
+#define ATSAM_I2C_2_BUS_PATH "/dev/i2c-2"
+
+int atsam_register_i2c_0(void);
+
+int atsam_register_i2c_1(void);
+
+int atsam_register_i2c_2(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_I2C_H */
diff --git a/bsps/arm/atsam/include/bsp/irq.h b/bsps/arm/atsam/include/bsp/irq.h
new file mode 100644
index 0000000000..19370e4852
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/irq.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_ESV_70_IRQ_H
+#define LIBBSP_ARM_ATSAM_ESV_70_IRQ_H
+
+#include <bspopts.h>
+
+#ifndef ASM
+  #include <rtems.h>
+  #include <rtems/irq.h>
+  #include <rtems/irq-extension.h>
+#endif
+
+#define BSP_INTERRUPT_VECTOR_MIN 0
+
+#define BSP_INTERRUPT_VECTOR_MAX 64
+
+#endif /* LIBBSP_ARM_ATSAM_ESV_70_IRQ_H */
diff --git a/bsps/arm/atsam/include/bsp/pin-config.h b/bsps/arm/atsam/include/bsp/pin-config.h
new file mode 100644
index 0000000000..8f4a61428f
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/pin-config.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_PIN_CONFIG_H
+#define LIBBSP_ARM_ATSAM_PIN_CONFIG_H
+
+#include <libchip/chip.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+extern const Pin atsam_pin_config[];
+
+extern const size_t atsam_pin_config_count;
+
+extern const uint32_t atsam_matrix_ccfg_sysio;
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_PIN_CONFIG_H */
diff --git a/bsps/arm/atsam/include/bsp/power.h b/bsps/arm/atsam/include/bsp/power.h
new file mode 100644
index 0000000000..a352386a0e
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/power.h
@@ -0,0 +1,245 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_POWER_H
+#define LIBBSP_ARM_ATSAM_POWER_H
+
+#include <sys/types.h>
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"{
+#endif /* __cplusplus */
+
+/**
+ * @brief Status of the Low Power Support
+ */
+typedef enum {
+  /**
+   * @brief Used for Initialization of Handlers
+   */
+  ATSAM_POWER_INIT,
+  /**
+   * @brief Used for Switching On of Handlers
+   */
+  ATSAM_POWER_ON,
+  /**
+   * @brief Used for Switching Off of Handlers
+   */
+  ATSAM_POWER_OFF
+} atsam_power_state;
+
+/**
+ * @brief Control structure for power control handling
+ */
+typedef struct atsam_power_control {
+  /**
+   * @brief Data pointer to the handler with its desired state
+   */
+  void (*handler)(
+      const struct atsam_power_control *control,
+      atsam_power_state state
+  );
+  /**
+   * @brief Data chunk that is used by the handler
+   */
+  union {
+    void *arg;
+    struct {
+      uint8_t first;
+      uint8_t last;
+    } peripherals;
+  } data;
+} atsam_power_control;
+
+/**
+ * @brief Performs a power state change according to the state parameter.
+ *
+ * The handlers of the control table are invoked in forward order (invocation
+ * starts with table index zero) for the ATSAM_POWER_INIT and ATSAM_POWER_OFF
+ * states, otherwise the handlers are invoked in reverse order (invocation
+ * starts with the last table index).
+ *
+ * @param controls Table with power controls.
+ * @param n Count of power control table entries.
+ * @param state The desired power state.
+ *
+ * @code
+ * #include <rtems.h>
+ * #include <pthread.h>
+ *
+ * #include <bsp/power.h>
+ *
+ * static atsam_power_data_rtc_driver rtc_data = { .interval = 5 };
+ *
+ * static const atsam_power_control power_controls[] = {
+ *   ATSAM_POWER_CLOCK_DRIVER,
+ *   ATSAM_POWER_RTC_DRIVER(&rtc_data),
+ *   ATSAM_POWER_SLEEP_MODE
+ * };
+ *
+ * static pthread_once_t once = PTHREAD_ONCE_INIT;
+ *
+ * static void init(void)
+ * {
+ *   atsam_power_change_state(
+ *     &power_controls[0],
+ *     RTEMS_ARRAY_SIZE(power_controls),
+ *     ATSAM_POWER_INIT
+ *   );
+ * }
+ *
+ * void power_init(void)
+ * {
+ *   pthread_once(&once, init);
+ * }
+ *
+ * void low_power(void)
+ * {
+ *   atsam_power_change_state(
+ *     &power_controls[0],
+ *     RTEMS_ARRAY_SIZE(power_controls),
+ *     ATSAM_POWER_OFF
+ *   );
+ *   atsam_power_change_state(
+ *     &power_controls[0],
+ *     RTEMS_ARRAY_SIZE(power_controls),
+ *     ATSAM_POWER_ON
+ *   );
+ * }
+ * @end
+ */
+void atsam_power_change_state(
+  const atsam_power_control *controls,
+  size_t n,
+  atsam_power_state state
+);
+
+/**
+ * @brief Power handler for a set of peripherals according to the specified
+ * peripheral indices.
+ *
+ * For the power off state, the peripherals are enabled in the PMC.
+ *
+ * For the power on state, the peripherals are disabled in the Power Management
+ * Controller (PMC).
+ *
+ * @see ATSAM_POWER_PERIPHERAL().
+ */
+void atsam_power_handler_peripheral(
+  const atsam_power_control *controls,
+  atsam_power_state state
+);
+
+/**
+ * @brief Power handler for the clock driver.
+ *
+ * For the power off state, the system tick is disabled.
+ *
+ * For the power on state, the system tick is enabled.  In case no clock driver
+ * is used by the application, then this may lead to a spurious interrupt
+ * resulting in a fatal error.
+ *
+ * @see ATSAM_POWER_CLOCK_DRIVER().
+ */
+void atsam_power_handler_clock_driver(
+  const atsam_power_control *controls,
+  atsam_power_state state
+);
+
+/**
+ * @brief Power handler for the RTC driver.
+ *
+ * This handler installs an interrupt handler during power support initialization.
+ *
+ * For the power off state, the RTC alarm interrupt is set up according to the
+ * interval of the corresponding handler data.
+ *
+ * For the power on state, the RTC alarm interrupt is disabled.
+ *
+ * @see ATSAM_POWER_RTC_DRIVER().
+ */
+void atsam_power_handler_rtc_driver(
+  const atsam_power_control *controls,
+  atsam_power_state state
+);
+
+/**
+ * @brief Power handler to enter the processor sleep mode.
+ *
+ * For the power off state, the processor is set into the sleep mode and issues
+ * a wait for interrupt instruction.
+ *
+ * @see ATSAM_POWER_SLEEP_MODE().
+ */
+void atsam_power_handler_sleep_mode(
+  const atsam_power_control *controls,
+  atsam_power_state state
+);
+
+/**
+ * @brief Initializer for a peripheral power support.
+ *
+ * @param f The first peripheral index.
+ * @param l The last peripheral index.
+ */
+#define ATSAM_POWER_PERIPHERAL(f, l) \
+ { \
+   .handler = atsam_power_handler_peripheral, \
+   .data = { .peripherals = { .first = f, .last = l } } \
+ }
+
+#define ATSAM_POWER_HANDLER(h, a) \
+ { \
+   .handler = h, \
+   .data = { .arg = a } \
+ }
+
+#define ATSAM_POWER_CLOCK_DRIVER \
+ { .handler = atsam_power_handler_clock_driver }
+
+#define ATSAM_POWER_SLEEP_MODE \
+ { .handler = atsam_power_handler_sleep_mode }
+
+/**
+ * @brief Data for RTC driver power support.
+ *
+ * @see ATSAM_POWER_RTC_DRIVER().
+ */
+typedef struct {
+  /**
+   * @brief Interval in seconds for which the power off mode should be active.
+   */
+  uint8_t interval;
+} atsam_power_data_rtc_driver;
+
+/**
+ * @brief Initializer for RTC driver power support.
+ *
+ * @param a Pointer to RTC driver power data.
+ *
+ * @see atsam_power_data_rtc_driver.
+ */
+#define ATSAM_POWER_RTC_DRIVER(a) \
+ { \
+    .handler = atsam_power_handler_rtc_driver, \
+    .data = { .arg = a } \
+ }
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_POWER_H */
diff --git a/bsps/arm/atsam/include/bsp/sc16is752.h b/bsps/arm/atsam/include/bsp/sc16is752.h
new file mode 100644
index 0000000000..35d298a7ed
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/sc16is752.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_SC16IS752_H
+#define LIBBSP_ARM_ATSAM_SC16IS752_H
+
+#include <libchip/chip.h>
+
+#include <dev/serial/sc16is752.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+typedef struct {
+  sc16is752_spi_context base;
+  Pin irq_pin;
+} atsam_sc16is752_spi_context;
+
+/**
+ * @brief Creates an SPI connected SC16IS752 device.
+ *
+ * This devices uses the interrupt server, see
+ * rtems_interrupt_server_initialize().
+ *
+ * The device claims the interrupt of the PIO block.
+ *
+ * @param[in] ctx The device context.  May have an arbitrary content.
+ * @param[in] device_path The device file path for the new device.
+ * @param[in] mode The SC16IS752 mode.
+ * @param[in] input_frequency The input frequency in Hertz of the SC16IS752
+ *   chip.  See XTAL1 and XTAL2 pins.
+ * @param[in] spi_path The SPI bus device path.
+ * @param[in] spi_chip_select The SPI chip select (starts with 0, the SPI
+ *   driver uses SPI_ChipSelect(1 << spi_chip_select)).
+ * @param[in] spi_speed_hz The SPI bus speed in Hertz.
+ * @param[in] irq_pin The interrupt pin, e.g. { PIO_PD28, PIOD, ID_PIOD,
+ *   PIO_INPUT, PIO_IT_LOW_LEVEL }.
+ *
+ * @return See sc16is752_spi_create().
+ */
+int atsam_sc16is752_spi_create(
+  atsam_sc16is752_spi_context *ctx,
+  const char                  *device_path,
+  sc16is752_mode               mode,
+  uint32_t                     input_frequency,
+  const char                  *spi_path,
+  uint8_t                      spi_chip_select,
+  uint32_t                     spi_speed_hz,
+  const Pin                    *irq_pin
+);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_SC16IS752_H */
diff --git a/bsps/arm/atsam/include/bsp/spi.h b/bsps/arm/atsam/include/bsp/spi.h
new file mode 100644
index 0000000000..958e629ba3
--- /dev/null
+++ b/bsps/arm/atsam/include/bsp/spi.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <info@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifndef LIBBSP_ARM_ATSAM_SPI_H
+#define LIBBSP_ARM_ATSAM_SPI_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+#define ATSAM_SPI_0_BUS_PATH "/dev/spi-0"
+#define ATSAM_SPI_1_BUS_PATH "/dev/spi-1"
+#define ATSAM_SPI_2_BUS_PATH "/dev/spi-2"
+
+int atsam_register_spi_0(void);
+
+int atsam_register_spi_1(void);
+
+int atsam_register_spi_2(void);
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /* LIBBSP_ARM_ATSAM_SPI_H */