path: root/user/bsps/aarch64
diff options
authorGedare Bloom <>2021-06-22 20:19:56 -0600
committerGedare Bloom <>2021-06-22 22:06:34 -0600
commit7a91021c72b5f01ca913c66e10c0f1865e87c487 (patch)
treed9dbd80f8e9fd25aaba4f12bce6c0670ef5d60bf /user/bsps/aarch64
parentuser: Fixed typo to build hello application (diff)
user/bsps: add aarch64 xilinx-versal
Diffstat (limited to 'user/bsps/aarch64')
1 files changed, 39 insertions, 0 deletions
diff --git a/user/bsps/aarch64/xilinx-versal.rst b/user/bsps/aarch64/xilinx-versal.rst
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+++ b/user/bsps/aarch64/xilinx-versal.rst
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+.. SPDX-License-Identifier: CC-BY-SA-4.0
+.. Copyright (C) 2021 Gedare Bloom
+.. _BSP_aarch64_qemu_xilinx_versal_ilp32_qemu:
+.. _BSP_aarch64_qemu_xilinx_versal_lp64_qemu:
+Qemu Xilinx Versal
+This BSP supports two variants, `xilinx-versal-ilp32-qemu` and
+`xilinx-versal-lp64-qemu`. The basic hardware initialization is performed by the
+BSP. These BSPs support the GICv3 interrupt controller present in the Xilinx
+Versal Adaptive Compute Acceleration Platform (ACAP) systems. The BSPs
+currently only work when started in the secure mode.
+Boot via ELF
+The executable image is booted by Qemu in ELF format.
+Clock Driver
+The clock driver uses the `ARM Generic Timer`.
+Console Driver
+The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
+There are some differences between the PL011 and the UART used by actual Versal
+ACAP hardware systems.
+Running Executables
+Executables generated by these BSPs can be run using the following command::
+qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
+ -machine xlnx-versal-virt -m 4096 -kernel example.exe