user/bsps: add aarch64 xilinx-versal

2 files changed, 40 insertions, 0 deletions

diff --git a/user/bsps/aarch64/xilinx-versal.rst b/user/bsps/aarch64/xilinx-versal.rst
new file mode 100644
index 0000000..51489f2
--- /dev/null
+++ b/user/bsps/aarch64/xilinx-versal.rst
@@ -0,0 +1,39 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2021 Gedare Bloom 
+
+.. _BSP_aarch64_qemu_xilinx_versal_ilp32_qemu:
+.. _BSP_aarch64_qemu_xilinx_versal_lp64_qemu:
+
+Qemu Xilinx Versal 
+==================
+
+This BSP supports two variants, `xilinx-versal-ilp32-qemu` and
+`xilinx-versal-lp64-qemu`. The basic hardware initialization is performed by the
+BSP. These BSPs support the GICv3 interrupt controller present in the Xilinx
+Versal Adaptive Compute Acceleration Platform (ACAP) systems. The BSPs
+currently only work when started in the secure mode.
+
+Boot via ELF
+------------
+The executable image is booted by Qemu in ELF format.
+
+Clock Driver
+------------
+
+The clock driver uses the `ARM Generic Timer`.
+
+Console Driver
+--------------
+
+The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
+There are some differences between the PL011 and the UART used by actual Versal
+ACAP hardware systems.
+
+Running Executables
+-------------------
+
+Executables generated by these BSPs can be run using the following command::
+
+qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
+ -machine xlnx-versal-virt -m 4096 -kernel example.exe
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 566a750..933370f 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -7,4 +7,5 @@ aarch64 (AArch64)
 
 .. include:: aarch64/a53.rst
 .. include:: aarch64/a72.rst
+.. include:: aarch64/xilinx-versal.rst
 .. include:: aarch64/xilinx-zynqmp.rst