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-rw-r--r--spec/bsp/if/fatal-xil-clock-ttc-irq-install.yml14
-rw-r--r--spec/compiler/unit/builtins.yml221
-rw-r--r--spec/dev/clock/req/group.yml (renamed from spec/bsp/if/group-clock.yml)8
-rw-r--r--spec/dev/clock/req/mem-clock.yml (renamed from spec/bsp/req/mem-clock.yml)2
-rw-r--r--spec/dev/clock/val/mem-clock.yml (renamed from spec/bsp/val/mem-clock.yml)0
-rw-r--r--spec/dev/clock/xil-ttc/req/fatal-irq-install.yml18
-rw-r--r--spec/dev/clock/xil-ttc/req/group.yml16
-rw-r--r--spec/dev/clock/xil-ttc/req/tick-catch-up-interval.yml18
-rw-r--r--spec/dev/clock/xil-ttc/req/tick-catch-up-ticks.yml17
-rw-r--r--spec/dev/clock/xil-ttc/val/fatal-irq-install.yml92
-rw-r--r--spec/dev/clock/xil-ttc/val/tick-catch-up.yml71
-rw-r--r--spec/dev/grlib/if/group.yml2
-rw-r--r--spec/dev/req/group.yml (renamed from spec/req/dev.yml)2
-rw-r--r--spec/rtems/basedefs/if/alignof.yml8
-rw-r--r--spec/rtems/basedefs/if/no-return.yml8
-rw-r--r--spec/rtems/basedefs/if/static-assert.yml8
-rw-r--r--spec/score/isr/val/isr.yml2
-rw-r--r--spec/score/sched/smp/val/smp.yml1
-rw-r--r--spec/score/thread/req/global-construction-preinit-array-before-constructors.yml1
-rw-r--r--spec/score/thread/req/global-construction-preinit-array.yml1
-rw-r--r--spec/score/thread/val/preinit-array.yml1
-rw-r--r--spec/score/val/fatal.yml68
-rw-r--r--spec/testsuites/bsps/fatal-clock-xil-ttc-irq-install.yml24
-rw-r--r--spec/testsuites/bsps/validation-bsp-0.yml4
24 files changed, 569 insertions, 38 deletions
diff --git a/spec/bsp/if/fatal-xil-clock-ttc-irq-install.yml b/spec/bsp/if/fatal-xil-clock-ttc-irq-install.yml
new file mode 100644
index 00000000..ed23d0d6
--- /dev/null
+++ b/spec/bsp/if/fatal-xil-clock-ttc-irq-install.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: true
+index-entries: []
+interface-type: unspecified-enumerator
+links:
+- role: interface-placement
+ uid: fatal-header
+- role: interface-ingroup
+ uid: group-fatal
+name: XIL_FATAL_TTC_IRQ_INSTALL
+references: []
+type: interface
diff --git a/spec/compiler/unit/builtins.yml b/spec/compiler/unit/builtins.yml
index cad01f41..a1dbe9b0 100644
--- a/spec/compiler/unit/builtins.yml
+++ b/spec/compiler/unit/builtins.yml
@@ -11,6 +11,9 @@ test-actions:
action-code: |
volatile unsigned int n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1U;
T_eq_int( __builtin_clz( n ), 31 );
@@ -29,6 +32,9 @@ test-actions:
action-code: |
volatile unsigned long long n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1ULL;
T_eq_int( __builtin_clzll( n ), 63 );
@@ -53,6 +59,9 @@ test-actions:
action-code: |
volatile unsigned int n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1U;
T_eq_int( __builtin_ctz( n ), 0 );
@@ -71,6 +80,9 @@ test-actions:
action-code: |
volatile unsigned long long n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1ULL;
T_eq_int( __builtin_ctzll( n ), 0 );
@@ -95,6 +107,9 @@ test-actions:
action-code: |
volatile unsigned int n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1U;
T_eq_int( __builtin_ffs( n ), 1 );
@@ -113,6 +128,9 @@ test-actions:
action-code: |
volatile unsigned long long n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1ULL;
T_eq_int( __builtin_ffsll( n ), 1 );
@@ -137,6 +155,9 @@ test-actions:
action-code: |
volatile unsigned int n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1U;
T_eq_int( __builtin_parity( n ), 1 );
@@ -152,6 +173,9 @@ test-actions:
action-code: |
volatile unsigned long long n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 1ULL;
T_eq_int( __builtin_parityll( n ), 1 );
@@ -167,6 +191,9 @@ test-actions:
action-code: |
volatile unsigned int n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 0U;
T_eq_int( __builtin_popcount( n ), 0 );
@@ -185,6 +212,9 @@ test-actions:
action-code: |
volatile unsigned long long n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = 0ULL;
T_eq_int( __builtin_popcountll( n ), 0 );
@@ -203,6 +233,9 @@ test-actions:
action-code: |
volatile uint32_t n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = UINT32_C( 0 );
T_eq_u32( __builtin_bswap32( n ), n );
@@ -224,6 +257,9 @@ test-actions:
action-code: |
volatile uint64_t n;
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+
n = UINT64_C( 0 );
T_eq_u64( __builtin_bswap64( n ), n );
@@ -246,6 +282,11 @@ test-actions:
volatile int64_t a;
volatile int64_t b;
+ a = 0;
+ RTEMS_OBFUSCATE_VARIABLE( a );
+ b = 0;
+ RTEMS_OBFUSCATE_VARIABLE( b );
+
a = INT64_C( 0 );
b = INT64_C( 0 );
T_false( a < b );
@@ -272,6 +313,11 @@ test-actions:
volatile uint64_t a;
volatile uint64_t b;
+ a = 0;
+ RTEMS_OBFUSCATE_VARIABLE( a );
+ b = 0;
+ RTEMS_OBFUSCATE_VARIABLE( b );
+
a = UINT64_C( 0 );
b = UINT64_C( 0 );
T_false( a < b );
@@ -298,6 +344,11 @@ test-actions:
volatile int64_t i;
volatile int s;
+ i = 0;
+ RTEMS_OBFUSCATE_VARIABLE( i );
+ s = 0;
+ RTEMS_OBFUSCATE_VARIABLE( s );
+
i = INT64_C( 1 );
s = 0;
T_eq_i64( i << s, INT64_C( 1 ) );
@@ -324,6 +375,11 @@ test-actions:
volatile int64_t i;
volatile int s;
+ i = 0;
+ RTEMS_OBFUSCATE_VARIABLE( i );
+ s = 0;
+ RTEMS_OBFUSCATE_VARIABLE( s );
+
i = INT64_C( 1 );
s = 0;
T_eq_i64( i >> s, INT64_C( 1 ) );
@@ -350,6 +406,11 @@ test-actions:
volatile uint64_t i;
volatile int s;
+ i = 0;
+ RTEMS_OBFUSCATE_VARIABLE( i );
+ s = 0;
+ RTEMS_OBFUSCATE_VARIABLE( s );
+
i = UINT64_C( 1 );
s = 0;
T_eq_u64( i >> s, UINT64_C( 1 ) );
@@ -376,6 +437,11 @@ test-actions:
volatile int64_t a;
volatile int64_t b;
+ a = 0;
+ RTEMS_OBFUSCATE_VARIABLE( a );
+ b = 0;
+ RTEMS_OBFUSCATE_VARIABLE( b );
+
a = INT64_C( 1 );
b = INT64_C( 1 );
T_eq_i64( a * b, INT64_C( 1 ) );
@@ -397,6 +463,9 @@ test-actions:
action-code: |
volatile int64_t i;
+ i = 0;
+ RTEMS_OBFUSCATE_VARIABLE( i );
+
i = INT64_C( 1 );
T_eq_i64( -i, -INT64_C( 1 ) );
@@ -412,13 +481,21 @@ test-actions:
action-code: |
volatile int64_t n;
volatile int64_t d;
+ volatile int64_t x;
+
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+ d = 0;
+ RTEMS_OBFUSCATE_VARIABLE( d );
+ x = 0;
+ RTEMS_OBFUSCATE_VARIABLE( x );
n = INT64_C( 0 );
d = INT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
n = INT64_C( 1 );
@@ -426,7 +503,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
n = INT64_C( 0x7fffffffffffffff );
@@ -434,7 +511,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
n = INT64_C( 0x7fffffff00000000 );
@@ -442,7 +519,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
n = INT64_C( 0 );
@@ -522,74 +599,164 @@ test-actions:
action-code: |
volatile uint64_t n;
volatile uint64_t d;
+ volatile uint64_t x;
+
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+ d = 0;
+ RTEMS_OBFUSCATE_VARIABLE( d );
+ x = 0;
+ RTEMS_OBFUSCATE_VARIABLE( x );
n = UINT64_C( 0 );
d = UINT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ __udivmoddi4( n, d, NULL );
+ }
+ #endif
+
n = UINT64_C( 1 );
d = UINT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
}
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ __udivmoddi4( n, d, NULL );
+ }
+ #endif
+
n = UINT64_C( 0x7fffffffffffffff );
d = UINT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
+ }
+
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ __udivmoddi4( n, d, NULL );
}
+ #endif
n = UINT64_C( 0x7fffffff00000000 );
d = UINT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n / d;
+ x = n / d;
+ }
+
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ __udivmoddi4( n, d, NULL );
+ }
+ #endif
+
+ n = UINT64_C( 0x7fffffff00000000 );
+ d = UINT64_C( 0x7fffffff00000000 );
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ x = n / d;
+ }
+
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ do_longjmp = true;
+
+ if ( setjmp( exception_return_context ) == 0 ) {
+ __udivmoddi4( n, d, NULL );
}
+ #endif
n = UINT64_C( 0 );
d = UINT64_C( 1 );
T_eq_u64( n / d, UINT64_C( 0 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) );
+ #endif
n = UINT64_C( 1 );
d = UINT64_C( 1 );
T_eq_u64( n / d, UINT64_C( 1 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) );
+ #endif
n = UINT64_C( 0xffffffffffffffff );
d = UINT64_C( 1 );
T_eq_u64( n / d, UINT64_C( 0xffffffffffffffff ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0xffffffffffffffff ) );
+ #endif
n = UINT64_C( 2 );
d = UINT64_C( 1 );
T_eq_u64( n / d, UINT64_C( 2 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 2 ) );
+ #endif
n = UINT64_C( 1 );
d = UINT64_C( 0xffffffffffffffff );
T_eq_u64( n / d, UINT64_C( 0 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) );
+ #endif
n = UINT64_C( 0xffffffffffffffff );
d = UINT64_C( 0xffffffffffffffff );
T_eq_u64( n / d, UINT64_C( 1 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) );
+ #endif
n = UINT64_C( 0xffffffffffffffff );
d = UINT64_C( 0x8000000000000000 );
T_eq_u64( n / d, UINT64_C( 1 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) );
+ #endif
n = UINT64_C( 0x0000000100000001 );
d = UINT64_C( 0x0000000f00000000 );
T_eq_u64( n / d, UINT64_C( 0 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) );
+ #endif
+
+ n = UINT64_C( 0x0000000100000000 );
+ d = UINT64_C( 0x0000000f00000001 );
+ T_eq_u64( n / d, UINT64_C( 0 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) );
+ #endif
n = UINT64_C( 0xffffffff0000000f );
d = UINT64_C( 0x000000010000000f );
T_eq_u64( n / d, UINT64_C( 4294967280 ) );
+ #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER)
+ T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 4294967280 ) );
+ #endif
checks: []
links:
- name: __udivdi3
@@ -600,13 +767,21 @@ test-actions:
action-code: |
volatile int64_t n;
volatile int64_t d;
+ volatile int64_t x;
+
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+ d = 0;
+ RTEMS_OBFUSCATE_VARIABLE( d );
+ x = 0;
+ RTEMS_OBFUSCATE_VARIABLE( x );
n = INT64_C( 0 );
d = INT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = INT64_C( 1 );
@@ -614,7 +789,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = INT64_C( 0x7fffffffffffffff );
@@ -622,7 +797,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = INT64_C( 0x7fffffff00000000 );
@@ -630,7 +805,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = INT64_C( 0 );
@@ -722,13 +897,21 @@ test-actions:
action-code: |
volatile uint64_t n;
volatile uint64_t d;
+ volatile uint64_t x;
+
+ n = 0;
+ RTEMS_OBFUSCATE_VARIABLE( n );
+ d = 0;
+ RTEMS_OBFUSCATE_VARIABLE( d );
+ x = 0;
+ RTEMS_OBFUSCATE_VARIABLE( x );
n = UINT64_C( 0 );
d = UINT64_C( 0 );
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = UINT64_C( 1 );
@@ -736,7 +919,7 @@ test-actions:
do_longjmp = true;
if ( setjmp( exception_return_context ) == 0 ) {
- n = n % d;
+ x = n % d;
}
n = UINT64_C( 0 );
@@ -796,6 +979,16 @@ test-support: |
uint64_t __udivmoddi4( uint64_t n, uint64_t d, uint64_t *r );
#endif
+ #if defined(TEST_UDIVMODDI4) && defined(__arm__)
+ /*
+ * Here __aeabi_uldivmod() may be used to carry out integer division
+ * operations even though the reminder is unused. This function is
+ * implemented by __udivmoddi4() which may never get called without a
+ * reminder for compiler generated code.
+ */
+ #define TEST_UDIVMODDI4_WITHOUT_REMINDER
+ #endif
+
static bool do_longjmp;
static jmp_buf exception_return_context;
diff --git a/spec/bsp/if/group-clock.yml b/spec/dev/clock/req/group.yml
index 13ae5a3e..b33c30fb 100644
--- a/spec/bsp/if/group-clock.yml
+++ b/spec/dev/clock/req/group.yml
@@ -1,16 +1,16 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
-- Copyright (C) 2021 embedded brains GmbH & Co. KG
+- Copyright (C) 2021, 2024 embedded brains GmbH & Co. KG
enabled-by: true
identifier: RTEMSDriverClockImpl
links:
- role: interface-ingroup
- uid: group-shared
+ uid: ../../req/group
non-functional-type: design-group
rationale: null
references: []
requirement-type: non-functional
text: |
- The shared ${/glossary/bsp:/term} interrupt support shall be a component
- containing functions used to implement a ${/glossary/clock-driver:/term}.
+ The device driver component shall have a component containing
+ ${/glossary/clock-driver:/term} implementations.
type: requirement
diff --git a/spec/bsp/req/mem-clock.yml b/spec/dev/clock/req/mem-clock.yml
index 74f979d2..f3d097cb 100644
--- a/spec/bsp/req/mem-clock.yml
+++ b/spec/dev/clock/req/mem-clock.yml
@@ -4,7 +4,7 @@ copyrights:
enabled-by: true
links:
- role: requirement-refinement
- uid: ../if/group-clock
+ uid: group
- role: requirement-refinement
uid: /rtems/req/mem-basic
non-functional-type: quality
diff --git a/spec/bsp/val/mem-clock.yml b/spec/dev/clock/val/mem-clock.yml
index c1757c12..c1757c12 100644
--- a/spec/bsp/val/mem-clock.yml
+++ b/spec/dev/clock/val/mem-clock.yml
diff --git a/spec/dev/clock/xil-ttc/req/fatal-irq-install.yml b/spec/dev/clock/xil-ttc/req/fatal-irq-install.yml
new file mode 100644
index 00000000..fe0342ae
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/req/fatal-irq-install.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
+links:
+- role: requirement-refinement
+ uid: /req/fatal-error
+- role: requirement-refinement
+ uid: group
+functional-type: function
+rationale: null
+references: []
+requirement-type: functional
+text: |
+ If the installation of the clock interrupt entry fails, then the system shall
+ terminate with the ${/score/interr/if/source-bsp:/name} fatal source and the
+ ${/bsp/if/fatal-xil-clock-ttc-irq-install:/name} fatal code.
+type: requirement
diff --git a/spec/dev/clock/xil-ttc/req/group.yml b/spec/dev/clock/xil-ttc/req/group.yml
new file mode 100644
index 00000000..5e412c52
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/req/group.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
+identifier: RTEMSDriverClockXilTTC
+links:
+- role: interface-ingroup
+ uid: ../../req/group
+non-functional-type: design-group
+rationale: null
+references: []
+requirement-type: non-functional
+text: |
+ The clock driver implementation component shall have a component containing
+ the Xilinx Triple Timer Counter (TTC) clock driver implementation.
+type: requirement
diff --git a/spec/dev/clock/xil-ttc/req/tick-catch-up-interval.yml b/spec/dev/clock/xil-ttc/req/tick-catch-up-interval.yml
new file mode 100644
index 00000000..bd3bb314
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/req/tick-catch-up-interval.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: true
+links:
+- role: requirement-refinement
+ uid: group
+functional-type: function
+rationale: null
+references: []
+requirement-type: functional
+text: |
+ While a ${/glossary/clock-tick:/term} is serviced, while the difference of
+ current counter value to the matching counter value is greater than the clock
+ tick counter interval, when the matching counter value was updated, the
+ matching couter value shall be incremented by the clock tick counter
+ interval.
+type: requirement
diff --git a/spec/dev/clock/xil-ttc/req/tick-catch-up-ticks.yml b/spec/dev/clock/xil-ttc/req/tick-catch-up-ticks.yml
new file mode 100644
index 00000000..8ef21a83
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/req/tick-catch-up-ticks.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: true
+links:
+- role: requirement-refinement
+ uid: group
+functional-type: function
+rationale: null
+references: []
+requirement-type: functional
+text: |
+ While a ${/glossary/clock-tick:/term} is serviced, while the difference of
+ current counter value to the matching counter value is greater than the clock
+ tick counter interval, when the matching counter value was updated, a
+ timecounter tick shall be issued.
+type: requirement
diff --git a/spec/dev/clock/xil-ttc/val/fatal-irq-install.yml b/spec/dev/clock/xil-ttc/val/fatal-irq-install.yml
new file mode 100644
index 00000000..b2c22cdb
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/val/fatal-irq-install.yml
@@ -0,0 +1,92 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
+links: []
+test-actions:
+- action-brief: |
+ The test action is carried out by the OccupyClockInterrupt() system
+ initialization handler.
+ action-code: |
+ /* Nothing to do */
+ checks:
+ - brief: |
+ Check that the expected fatal source is present.
+ code: |
+ T_step_eq_int( ${.:/step}, ctx->source, RTEMS_FATAL_SOURCE_BSP );
+ links:
+ - role: validation
+ uid: ../req/fatal-irq-install
+ - brief: |
+ Check that the expected fatal code is present.
+ code: |
+ T_step_eq_ulong(
+ ${.:/step},
+ ctx->code,
+ XIL_FATAL_TTC_IRQ_INSTALL
+ );
+ links:
+ - role: validation
+ uid: ../req/fatal-irq-install
+ links: []
+test-brief: |
+ Tests a fatal error.
+test-context: []
+test-context-support: null
+test-description: null
+test-header:
+ code: null
+ freestanding: true
+ includes:
+ - rtems.h
+ local-includes: []
+ run-params:
+ - description: |
+ is fatal source.
+ dir: null
+ name: source
+ specifier: ${/rtems/userext/if/fatal-source:/name} ${.:name}
+ - description: |
+ is fatal code.
+ dir: null
+ name: code
+ specifier: ${/rtems/userext/if/fatal-code:/name} ${.:name}
+ target: testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.h
+test-includes:
+- rtems.h
+- rtems/sysinit.h
+- bsp.h
+- bsp/fatal.h
+test-local-includes:
+- tr-fatal-clock-xil-ttc-irq-install.h
+test-setup: null
+test-stop: null
+test-support: |
+ static void ClockInterrupt( void *arg )
+ {
+ (void) arg;
+ }
+
+ static rtems_interrupt_entry interrupt_entry = RTEMS_INTERRUPT_ENTRY_INITIALIZER(
+ ClockInterrupt,
+ NULL,
+ "Clock"
+ );
+
+ static void OccupyClockInterrupt( void )
+ {
+ (void) rtems_interrupt_entry_install(
+ XIL_CLOCK_TTC_IRQ,
+ RTEMS_INTERRUPT_UNIQUE,
+ &interrupt_entry
+ );
+ }
+
+ RTEMS_SYSINIT_ITEM(
+ OccupyClockInterrupt,
+ RTEMS_SYSINIT_DEVICE_DRIVERS,
+ RTEMS_SYSINIT_ORDER_FIRST
+ );
+test-target: testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.c
+test-teardown: null
+type: test-case
diff --git a/spec/dev/clock/xil-ttc/val/tick-catch-up.yml b/spec/dev/clock/xil-ttc/val/tick-catch-up.yml
new file mode 100644
index 00000000..d66f088b
--- /dev/null
+++ b/spec/dev/clock/xil-ttc/val/tick-catch-up.yml
@@ -0,0 +1,71 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
+links: []
+test-actions:
+- action-brief: |
+ Synchronize with the clock tick. Disable interrupts. Busy wait three
+ clock tick intervals. Enable interrupts.
+ action-code: |
+ uint32_t ns_per_tick;
+ uint64_t three_ticks_interval;
+ rtems_interrupt_level level;
+ rtems_interval t_0;
+ rtems_interval t_1;
+ rtems_interval t_2;
+ uint64_t m_0;
+ uint64_t m_1;
+
+ ns_per_tick = rtems_configuration_get_nanoseconds_per_tick();
+ three_ticks_interval = ( 7 * (uint64_t) nstosbt( ns_per_tick ) ) / 2;
+ t_0 = rtems_clock_get_ticks_since_boot();
+
+ /* Synchronize with clock tick */
+ do {
+ t_1 = rtems_clock_get_ticks_since_boot();
+ m_0 = (uint64_t) rtems_clock_get_monotonic_sbintime();
+ } while ( t_0 == t_1 );
+
+ rtems_interrupt_local_disable( level );
+
+ do {
+ m_1 = (uint64_t) rtems_clock_get_monotonic_sbintime();
+ } while ( m_1 - m_0 <= three_ticks_interval );
+
+ rtems_interrupt_local_enable( level );
+
+ /*
+ * Make sure the clock interrupt was serviced after the interrupt enable.
+ */
+ do {
+ t_2 = rtems_clock_get_ticks_since_boot();
+ } while ( t_1 == t_2 );
+ checks:
+ - brief: |
+ Check that exactly three clock ticks happened once interrupts are enabled
+ again.
+ code: |
+ T_step_eq_u32( ${.:/step}, t_2 - t_1, 3 );
+ links:
+ - role: validation
+ uid: ../req/tick-catch-up-interval
+ - role: validation
+ uid: ../req/tick-catch-up-ticks
+ links: []
+test-brief: |
+ Tests some Xilinx TTC clock driver functions.
+test-context: []
+test-context-support: null
+test-description: null
+test-header: null
+test-includes:
+- rtems.h
+- sys/time.h
+test-local-includes: []
+test-setup: null
+test-stop: null
+test-support: null
+test-target: testsuites/validation/tc-dev-clock-xil-ttc.c
+test-teardown: null
+type: test-case
diff --git a/spec/dev/grlib/if/group.yml b/spec/dev/grlib/if/group.yml
index 25f5cc31..d5083fd0 100644
--- a/spec/dev/grlib/if/group.yml
+++ b/spec/dev/grlib/if/group.yml
@@ -12,7 +12,7 @@ links:
- role: interface-placement
uid: gptimer-header
- role: interface-ingroup
- uid: /req/dev
+ uid: ../../req/group
name: GRLIB
text: |
The device driver software component shall provide an interface to the GRLIB
diff --git a/spec/req/dev.yml b/spec/dev/req/group.yml
index c40a3cdf..5b8837c1 100644
--- a/spec/req/dev.yml
+++ b/spec/dev/req/group.yml
@@ -5,7 +5,7 @@ enabled-by: true
identifier: RTEMSDeviceDrivers
links:
- role: requirement-refinement
- uid: root
+ uid: /req/root
non-functional-type: design-group
rationale: null
references: []
diff --git a/spec/rtems/basedefs/if/alignof.yml b/spec/rtems/basedefs/if/alignof.yml
index e9299228..c0011137 100644
--- a/spec/rtems/basedefs/if/alignof.yml
+++ b/spec/rtems/basedefs/if/alignof.yml
@@ -18,7 +18,9 @@ definition:
params: []
return: null
enabled-by:
- - ${/compiler/if/cplusplus:/name} >= 201103L
+ and:
+ - defined( ${/compiler/if/cplusplus:/name} )
+ - ${/compiler/if/cplusplus:/name} >= 201103L
- definition:
attributes: null
body: |
@@ -26,7 +28,9 @@ definition:
params: []
return: null
enabled-by:
- - ${/compiler/if/stdc-version:/name} >= 201112L
+ and:
+ - defined( ${/compiler/if/stdc-version:/name} )
+ - ${/compiler/if/stdc-version:/name} >= 201112L
description: null
enabled-by: true
index-entries: []
diff --git a/spec/rtems/basedefs/if/no-return.yml b/spec/rtems/basedefs/if/no-return.yml
index 70413c1e..a9953ee7 100644
--- a/spec/rtems/basedefs/if/no-return.yml
+++ b/spec/rtems/basedefs/if/no-return.yml
@@ -10,11 +10,15 @@ definition:
- definition: |
[[noreturn]]
enabled-by:
- - ${/compiler/if/cplusplus:/name} >= 201103L
+ and:
+ - defined( ${/compiler/if/cplusplus:/name} )
+ - ${/compiler/if/cplusplus:/name} >= 201103L
- definition: |
_Noreturn
enabled-by:
- - ${/compiler/if/stdc-version:/name} >= 201112L
+ and:
+ - defined( ${/compiler/if/stdc-version:/name} )
+ - ${/compiler/if/stdc-version:/name} >= 201112L
- definition: |
__attribute__(( __noreturn__ ))
enabled-by:
diff --git a/spec/rtems/basedefs/if/static-assert.yml b/spec/rtems/basedefs/if/static-assert.yml
index 152cd291..28c27051 100644
--- a/spec/rtems/basedefs/if/static-assert.yml
+++ b/spec/rtems/basedefs/if/static-assert.yml
@@ -19,7 +19,9 @@ definition:
params: []
return: null
enabled-by:
- - ${/compiler/if/cplusplus:/name} >= 201103L
+ and:
+ - defined( ${/compiler/if/cplusplus:/name} )
+ - ${/compiler/if/cplusplus:/name} >= 201103L
- definition:
attributes: null
body: |
@@ -27,7 +29,9 @@ definition:
params: []
return: null
enabled-by:
- - ${/compiler/if/stdc-version:/name} >= 201112L
+ and:
+ - defined( ${/compiler/if/stdc-version:/name} )
+ - ${/compiler/if/stdc-version:/name} >= 201112L
description: null
enabled-by: true
index-entries: []
diff --git a/spec/score/isr/val/isr.yml b/spec/score/isr/val/isr.yml
index dd89b63f..cc088177 100644
--- a/spec/score/isr/val/isr.yml
+++ b/spec/score/isr/val/isr.yml
@@ -182,7 +182,7 @@ test-support: |
(void) arg;
- #if defined(RTEMS_SMP)
+ #if defined(RTEMS_SMP) && !(defined(__PPC__) || (__powerpc64__))
Per_CPU_Control *cpu_self;
cpu_self = _Per_CPU_Get();
diff --git a/spec/score/sched/smp/val/smp.yml b/spec/score/sched/smp/val/smp.yml
index 610b30f9..fb106cd6 100644
--- a/spec/score/sched/smp/val/smp.yml
+++ b/spec/score/sched/smp/val/smp.yml
@@ -972,6 +972,7 @@ test-support: |
SetScheduler( ctx->worker_id[ WORKER_C ], SCHEDULER_B_ID, PRIO_HIGH );
SetPriority( ctx->worker_id[ WORKER_A ], PRIO_NORMAL );
MakeBusy( ctx, WORKER_C );
+ WaitForBusy( ctx, WORKER_C );
MakeBusy( ctx, WORKER_A );
}
diff --git a/spec/score/thread/req/global-construction-preinit-array-before-constructors.yml b/spec/score/thread/req/global-construction-preinit-array-before-constructors.yml
index 53b64dc4..b9769782 100644
--- a/spec/score/thread/req/global-construction-preinit-array-before-constructors.yml
+++ b/spec/score/thread/req/global-construction-preinit-array-before-constructors.yml
@@ -2,6 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0
copyrights:
- Copyright (C) 2022 embedded brains GmbH & Co. KG
enabled-by:
+- aarch64
- arm
- riscv
links:
diff --git a/spec/score/thread/req/global-construction-preinit-array.yml b/spec/score/thread/req/global-construction-preinit-array.yml
index 88e7b851..9a16a1cc 100644
--- a/spec/score/thread/req/global-construction-preinit-array.yml
+++ b/spec/score/thread/req/global-construction-preinit-array.yml
@@ -2,6 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0
copyrights:
- Copyright (C) 2022 embedded brains GmbH & Co. KG
enabled-by:
+- aarch64
- arm
- riscv
links:
diff --git a/spec/score/thread/val/preinit-array.yml b/spec/score/thread/val/preinit-array.yml
index 6a1dc895..5e737071 100644
--- a/spec/score/thread/val/preinit-array.yml
+++ b/spec/score/thread/val/preinit-array.yml
@@ -2,6 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
- Copyright (C) 2022 embedded brains GmbH & Co. KG
enabled-by:
+- aarch64
- arm
- riscv
links: []
diff --git a/spec/score/val/fatal.yml b/spec/score/val/fatal.yml
index d5e414ab..09664807 100644
--- a/spec/score/val/fatal.yml
+++ b/spec/score/val/fatal.yml
@@ -1,12 +1,12 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
-- Copyright (C) 2021 embedded brains GmbH & Co. KG
+- Copyright (C) 2021, 2024 embedded brains GmbH & Co. KG
enabled-by: true
links: []
test-actions:
- action-brief: |
Construct a task with a task body which returns. Check that the right
- fatal error occurs.
+ fatal error occurred.
action-code: |
rtems_id id;
unsigned int counter;
@@ -26,9 +26,10 @@ test-actions:
- role: validation
uid: ../thread/req/fatal-thread-exitted
- action-brief: |
- Construct a task which performs a thread dispatch with maskable interrupts
- disabled. Check that the right fatal error occurs or no fatal error
- occurs.
+ Construct a task which performs a direct thread dispatch with maskable
+ interrupts disabled. Where robust thread dispatching is required, check
+ that the right fatal error occurred, otherwise check that no fatal error
+ occurred.
action-code: |
rtems_id id;
unsigned int counter;
@@ -37,7 +38,44 @@ test-actions:
SetSelfPriority( PRIO_NORMAL );
counter = ResetFatalInfo( ctx );
id = CreateTask( "BENV", PRIO_HIGH );
- StartTask( id, ISRDisabledThreadDispatchTask, NULL );
+ StartTask( id, ISRDisabledDirectThreadDispatchTask, NULL );
+
+ #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
+ if ( rtems_configuration_get_maximum_processors() > 1 ) {
+ #endif
+ T_eq_uint( GetFatalCounter( ctx ), counter + 1 );
+ T_eq_int( ctx->source, INTERNAL_ERROR_CORE );
+ T_eq_ulong( ctx->code, INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT );
+ #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
+ } else {
+ T_eq_uint( GetFatalCounter( ctx ), counter );
+ }
+ #endif
+
+ RestoreRunnerPriority();
+ SetFatalHandler( NULL, NULL );
+ checks: []
+ links:
+ - role: validation
+ uid: ../thread/req/fatal-bad-thread-dispatch-environment-ipi
+ - role: validation
+ uid: ../thread/req/fatal-bad-thread-dispatch-environment-robust
+ - role: validation
+ uid: ../thread/req/thread-dispatch-isr-disabled
+- action-brief: |
+ Construct a task which performs an on demand thread dispatch with maskable
+ interrupts disabled. Where robust thread dispatching is required, check
+ that the right fatal error occurred, otherwise check that no fatal error
+ occurred.
+ action-code: |
+ rtems_id id;
+ unsigned int counter;
+
+ SetFatalHandler( FatalBadThreadDispatchEnvironment, ctx );
+ SetSelfPriority( PRIO_NORMAL );
+ counter = ResetFatalInfo( ctx );
+ id = CreateTask( "BENV", PRIO_HIGH );
+ StartTask( id, ISRDisabledOnDemandThreadDispatchTask, NULL );
#if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE
if ( rtems_configuration_get_maximum_processors() > 1 ) {
@@ -63,7 +101,8 @@ test-actions:
uid: ../thread/req/thread-dispatch-isr-disabled
- action-brief: |
Construct a task which performs a direct thread dispatch with a thread
- dispatch level not equal to one. Check that the right fatal error occurs.
+ dispatch level not equal to one. Check that the right fatal error
+ occurred.
action-code: |
rtems_id id;
unsigned int counter;
@@ -238,10 +277,11 @@ test-support: |
{
Fatal( source, code, arg );
_ISR_Set_level( 0 );
- _Thread_Dispatch_direct_no_return( _Per_CPU_Get() );
+ _Thread_Dispatch_unnest( _Per_CPU_Get() );
+ rtems_task_exit();
}
- static void ISRDisabledThreadDispatchTask( rtems_task_argument arg )
+ static void ISRDisabledDirectThreadDispatchTask( rtems_task_argument arg )
{
rtems_interrupt_level level;
@@ -251,6 +291,16 @@ test-support: |
rtems_task_exit();
}
+ static void ISRDisabledOnDemandThreadDispatchTask( rtems_task_argument arg )
+ {
+ rtems_interrupt_level level;
+
+ (void) arg;
+ rtems_interrupt_local_disable( level );
+ (void) level;
+ SetSelfPriority( PRIO_VERY_HIGH );
+ }
+
static void FatalBadThreadDispatchDisableLevel(
rtems_fatal_source source,
rtems_fatal_code code,
diff --git a/spec/testsuites/bsps/fatal-clock-xil-ttc-irq-install.yml b/spec/testsuites/bsps/fatal-clock-xil-ttc-irq-install.yml
new file mode 100644
index 00000000..17a18f9c
--- /dev/null
+++ b/spec/testsuites/bsps/fatal-clock-xil-ttc-irq-install.yml
@@ -0,0 +1,24 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+copyrights:
+- Copyright (C) 2024 embedded brains GmbH & Co. KG
+enabled-by: bsps/arm/xilinx-zynqmp-rpu
+links:
+- role: requirement-refinement
+ uid: ../validation
+test-brief: |
+ This validation test suite contains a test case which triggers a fatal error
+ during system initialization.
+test-code: |
+ const char rtems_test_name[] = "${.:/test-suite-name}";
+
+ #define FATAL_SYSINIT_RUN ${/dev/clock/xil-ttc/val/fatal-irq-install:/test-run}
+
+ #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
+
+ #include "ts-fatal-sysinit.h"
+test-description: null
+test-includes: []
+test-local-includes:
+- tr-fatal-clock-xil-ttc-irq-install.h
+test-target: testsuites/validation/bsps/ts-fatal-clock-xil-ttc-irq-install.c
+type: test-suite
diff --git a/spec/testsuites/bsps/validation-bsp-0.yml b/spec/testsuites/bsps/validation-bsp-0.yml
index d2cb81e5..94f2811f 100644
--- a/spec/testsuites/bsps/validation-bsp-0.yml
+++ b/spec/testsuites/bsps/validation-bsp-0.yml
@@ -1,7 +1,9 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
copyrights:
- Copyright (C) 2021 embedded brains GmbH & Co. KG
-enabled-by: bsps/sparc/leon3
+enabled-by:
+- bsps/arm/xilinx-zynqmp-rpu
+- bsps/sparc/leon3
links:
- role: requirement-refinement
uid: ../validation