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In a multi-processor system we must broadcast the TLB maintenance operation to
the Inner Shareable domain to ensure that the other processors update their TLB
caches accordingly.
Close #4068.
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Update #3818.
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Closes #4055
Closes #4056
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The external UART over SPI device SC16IS752 uses the interrupt server
for interrupt processing. The interrupt server is also heavily used by
libbsd. The interrupt processing for the SC16IS752 is time critical and
doesn't work if network traffic is processed at the same priority.
With #4033 custom interrupt servers are available. Change
atsam_sc16is752_spi_create() to support user-defined interrupt servers.
Introduced atsam_sc16is752_spi_config to cut down the argument count of
this function.
Close #4039.
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The chip select lines of the iMX SPI module doesn't work well for a
generic API like the one RTEMS uses. The existing solution only worked
in some special cases and had odd bugs when trying transfers of
different sizes (like deselecting between each byte for lengths that are
not dividable by 4).
With this patch the same approach like on FreeBSD or Linux is used:
Treat the CS lines as GPIOs.
Update 3869
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Update 3869
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Updates #2962
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Updates #2962
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_CPU_Counter_frequency() can be called by the rtems_counter
initialization before arm_gt_clock_initialize() initializes the value
used in _CPU_Counter_frequency().
Closes #3961.
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Some imx chips or boards don't use the same frequency for ECSPI and IPG.
Update #3869
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1) _Memory_Initialize makes pointer from integer
without a cast.
2) printf format error, expects %u but %lu provided.
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Updates #3938.
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Updates #3938.
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Updates #3938.
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Updates #3938.
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Updates #3938.
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Update #3938.
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Fixes #3903
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Statically initialize the ARMv7-M vector table to allow a placement in
ROM with read-only MPU settings.
Change licence to BSD-2-Clause in some files.
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Closes #3611.
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At least on GICv1 the interrupts 0 up to including 31 are so called
Peripheral Private Interrupts (PPIs). We have to initialize the
priority of the PPIs on secondary processors.
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This patch adds driver for Mini UART present in Raspberry Pi 3
and above, this UART is currently used as the primary UART in
these models.
The Mini UART is similar to ns16550, this driver is built
upon libchip/ns16550.
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Place idle and MPCI stacks into extra linker sections. This can be
optionally used by applications to control the placement of the stacks.
Update #3835.
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This avoids to pull in via printk() the Termios support which pulls in
the file system support. This fixes a spconfig02 test failure.
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Update #3869.
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Update #3869.
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This uses the tx-threshold to reduce gaps in SPI transmissions.
Update #3869.
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Update #3869.
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The new area is used by the i.MX 6UltraLite for example.
Update #3869.
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Update #3869.
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Update #3869.
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Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 instead of RTEMS_SYSINIT_ORDER_LAST
to allow applications and support functions to place system
initialization handlers behind the standard handlers.
Update #3838.
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The work area initialization was done by the BSP through
bsp_work_area_initialize(). This approach predated the system
initialization through the system initialization linker set. The
workspace and C program heap were unconditionally initialized. The aim
is to support RTEMS application configurations which do not need the
workspace and C program heap. In these configurations, the workspace
and C prgram heap should not get initialized.
Change all bsp_work_area_initialize() to implement _Memory_Get()
instead. Move the dirty memory, sbrk(), per-CPU data, workspace, and
malloc() heap initialization into separate system initialization steps.
This makes it also easier to test the individual initialization steps.
This change adds a dependency to _Heap_Extend() to all BSPs. This
dependency will be removed in a follow up change.
Update #3838.
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The code covered by BSP_GET_WORK_AREA_DEBUG was basically dead code
since there was no normal way to activate it (e.g. via a BSP
configuration option). A follow up patch will bring back this feature
through a CONFIGURE_VERBOSE_SYSTEM_INITIALIZATION configuration option.
Update #3838.
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Update #3838.
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This adds support for the GICv3 interrupt controller along with the
redistributor to control SGIs and PPIs which wasn't present in GICv2
implementations. GICv3 implementations only optionally support
memory-mapped GICC interface interaction and require system register
access be implemented, so the GICC interface is accessed only
through system registers.
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Replaces the legacy termios API with new termios API (#3034)
Replaces the custom PL011 serial driver with RTEMS arm-pl011.
Update #3034
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This commit adds FDT support to the BSP.
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The BSP tried to get the size of the SDRAM based on the revision code.
Unfortunately the code had some bugs so that the default size has been
used. Beneath that the MMU table hasn't been adapted.
This patch queries the SDRAM size via a special VC Mailbox call instead.
For the MMU adaption a simmilar method to the one in the imx BSP is
used.
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The imx BSP contained a hack to change the workspace entry of the MMU
table. This makes the used define visible for other BSPs too so that the
same hack can be used for example in raspberry pi too.
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Close #3789.
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Update #3818.
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