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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 08:36:30 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2015-07-23 08:36:30 +0200 |
| commit | 19078dc6e60010002498e455d2b6a39fd9160ba4 (patch) | |
| tree | 62d9f2ac76a9fd0584e2b4b544639525803b8969 /doc/cpu_supplement/sparc64.t | |
| parent | score: Move wait flag update to tq extract (diff) | |
| download | rtems-19078dc6e60010002498e455d2b6a39fd9160ba4.tar.bz2 | |
doc: Add SMP section to CPU Arch Supplement
Diffstat (limited to 'doc/cpu_supplement/sparc64.t')
| -rw-r--r-- | doc/cpu_supplement/sparc64.t | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/doc/cpu_supplement/sparc64.t b/doc/cpu_supplement/sparc64.t index f93000893a..5c07989467 100644 --- a/doc/cpu_supplement/sparc64.t +++ b/doc/cpu_supplement/sparc64.t @@ -773,6 +773,10 @@ default fatal error handler disables processor interrupts to level 15, places the error code in g1, and goes into an infinite loop to simulate a halt processor instruction. +@section Symmetric Multiprocessing + +SMP is not supported. + @section Thread-Local Storage Thread-local storage is supported. |