From 19078dc6e60010002498e455d2b6a39fd9160ba4 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Thu, 23 Jul 2015 08:36:30 +0200
Subject: doc: Add SMP section to CPU Arch Supplement

---
 doc/cpu_supplement/sparc64.t | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'doc/cpu_supplement/sparc64.t')

diff --git a/doc/cpu_supplement/sparc64.t b/doc/cpu_supplement/sparc64.t
index f93000893a..5c07989467 100644
--- a/doc/cpu_supplement/sparc64.t
+++ b/doc/cpu_supplement/sparc64.t
@@ -773,6 +773,10 @@ default fatal error handler disables processor interrupts to
 level 15, places the error code in g1, and goes into an infinite
 loop to simulate a halt processor instruction.
 
+@section Symmetric Multiprocessing
+
+SMP is not supported.
+
 @section Thread-Local Storage
 
 Thread-local storage is supported.
-- 
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