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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-03-09 15:47:32 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2012-03-09 15:55:32 +0100 |
| commit | c5a6e617a518f3af790fda865e61bb83e69e15c4 (patch) | |
| tree | 44869734758879e00b49f307b65aafd2e615b378 | |
| parent | bsp/gen5200: Reflect clocks of new BRS5L hardware (diff) | |
| download | rtems-c5a6e617a518f3af790fda865e61bb83e69e15c4.tar.bz2 | |
bsp/gen5200: Fix FPU initialization
The change of the MSR[FP] status requires a context-synchronizing
instruction.
| -rw-r--r-- | c/src/lib/libbsp/powerpc/gen5200/start/start.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/gen5200/start/start.S b/c/src/lib/libbsp/powerpc/gen5200/start/start.S index ae1a4ac742..d303fe3637 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/start/start.S +++ b/c/src/lib/libbsp/powerpc/gen5200/start/start.S @@ -706,6 +706,7 @@ FPU_init: SETBITS r30, r29, MSR_FP mtmsr r30 /* enable FPU and FPU exceptions */ + sync lfd f0, 0(r29) fmr f1, f0 |