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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-08-13 14:43:54 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-08-13 14:48:26 +0200 |
| commit | c32c80ea04272c33447191828ce06fb899f730f5 (patch) | |
| tree | 62975825b8a5e0dd4cbdf00afa43ff3fbb5bd17c | |
| parent | Fix a bug in spfreechain01 test case. (diff) | |
| download | rtems-c32c80ea04272c33447191828ce06fb899f730f5.tar.bz2 | |
bsps/arm: Use proper default priority for GIC
Some GIC implementations do not have the complete range of priorities.
The upper bits are RAZ/WI in this case.
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-gic-irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c index ed2d389589..c319c1ea0b 100644 --- a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c +++ b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c @@ -24,7 +24,7 @@ #define GIC_CPUIF ((volatile gic_cpuif *) BSP_ARM_GIC_CPUIF_BASE) -#define PRIORITY_DEFAULT 128 +#define PRIORITY_DEFAULT 127 void bsp_interrupt_dispatch(void) { |