Merge branch 'upstream'

26 files changed, 415 insertions, 270 deletions

diff --git a/c/src/lib/libbsp/arm/Makefile.am b/c/src/lib/libbsp/arm/Makefile.am
index b1cdd113e3..9783354c98 100644
--- a/c/src/lib/libbsp/arm/Makefile.am
+++ b/c/src/lib/libbsp/arm/Makefile.am
@@ -10,7 +10,7 @@ include_bsp_HEADERS = shared/include/linker-symbols.h
 
 dist_project_lib_DATA = shared/startup/linkcmds.base
 dist_project_lib_DATA += shared/startup/linkcmds.armv4
-dist_project_lib_DATA += shared/startup/linkcmds.armv7
+dist_project_lib_DATA += shared/startup/linkcmds.armv7m
 
 EXTRA_DIST =
 
diff --git a/c/src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965 b/c/src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965
index b3de8257d6..72c06a8c7c 100644
--- a/c/src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965
+++ b/c/src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965
@@ -25,4 +25,4 @@ REGION_ALIAS ("REGION_BSS", RAM_INT);
 REGION_ALIAS ("REGION_WORK", RAM_INT);
 REGION_ALIAS ("REGION_STACK", RAM_INT);
 
-INCLUDE linkcmds.armv7
+INCLUDE linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
index 096cf92141..275a934a09 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
+++ b/c/src/lib/libbsp/arm/lpc24xx/Makefile.am
@@ -67,6 +67,8 @@ project_lib_DATA += startup/linkcmds
 EXTRA_DIST = 
 EXTRA_DIST += startup/linkcmds.lpc17xx_ea_ram
 EXTRA_DIST += startup/linkcmds.lpc17xx_ea_rom_int
+EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_ram
+EXTRA_DIST += startup/linkcmds.lpc17xx_plx800_rom_int
 EXTRA_DIST += startup/linkcmds.lpc2362
 EXTRA_DIST += startup/linkcmds.lpc23xx_tli800
 EXTRA_DIST += startup/linkcmds.lpc24xx_ea
diff --git a/c/src/lib/libbsp/arm/lpc24xx/configure.ac b/c/src/lib/libbsp/arm/lpc24xx/configure.ac
index 9bdfc4c717..0076b45afd 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/configure.ac
+++ b/c/src/lib/libbsp/arm/lpc24xx/configure.ac
@@ -32,26 +32,24 @@ RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
 RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U])
 RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
 
-RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[120000000U])
-#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[96000000U])
-#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[48000000U])
+RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17xx_ea*],[120000000U])
 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc23*],[58982400U])
 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc24xx_plx800_*],[51612800U])
 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
 RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
 
-RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17*],[2U])
+RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17xx_ea*],[2U])
 RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[*],[1U])
-RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
+RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
 
-RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17*],[2U])
+RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17xx_ea*],[2U])
 RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[*],[1U])
-RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
+RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
 
 RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
 RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
 
-RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc24xx_ea],[1])
+RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[*_ea_*],[1])
 RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[*],[])
 RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
 
@@ -60,7 +58,7 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MT48LC4M16A2],[enable Micron MT48LC4M16A2 config
 
 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_W9825G2JB75I],[enable Winbond W9825G2JB75I configuration for EMC])
 
-RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[lpc24xx_plx800_rom_*],[1])
+RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800D7],[*_plx800_rom_*],[1])
 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800D7],[enable ISSI IS42S32800D7 configuration for EMC])
 
 RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800B],[lpc17xx_ea_rom_*],[1])
@@ -69,7 +67,7 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800B],[enable ISSI IS42S32800B configurat
 RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W160E],[lpc24xx_ncs_rom_*],[1])
 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W160E],[enable M29W160E configuration for EMC])
 
-RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[lpc24xx_plx800_rom_*],[1])
+RTEMS_BSPOPTS_SET([LPC24XX_EMC_M29W320E70],[*_plx800_rom_*],[1])
 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_M29W320E70],[enable M29W320E70 configuration for EMC])
 
 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_SST39VF3201],[enable SST39VF3201 configuration for EMC])
@@ -80,12 +78,12 @@ RTEMS_BSPOPTS_HELP([LPC24XX_EMC_TEST],[enable tests for EMC])
 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_CONSOLE],[*],[0])
 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)])
 
-RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[lpc24xx_plx800_*],[0])
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*_plx800_*],[0])
 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
 
 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc23*],[0])
 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_ncs_*],[0])
-RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[lpc24xx_plx800_*],[0])
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*_plx800_*],[0])
 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
 
 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[lpc23*],[0])
diff --git a/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c b/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
index cf6f4a6e15..3691fe0dae 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
@@ -93,7 +93,7 @@ console_tbl Console_Configuration_Ports [] = {
   #ifdef LPC24XX_CONFIG_CONSOLE
     {
       .sDeviceName = "/dev/ttyS0",
-      .deviceType = SERIAL_NS16550,
+      .deviceType = SERIAL_NS16550_WITH_FDR,
       .pDeviceFns = &ns16550_fns,
       .deviceProbe = NULL,
       .pDeviceFlow = NULL,
@@ -114,7 +114,7 @@ console_tbl Console_Configuration_Ports [] = {
   #ifdef LPC24XX_CONFIG_UART_1
     {
       .sDeviceName = "/dev/ttyS1",
-      .deviceType = SERIAL_NS16550,
+      .deviceType = SERIAL_NS16550_WITH_FDR,
       .pDeviceFns = &ns16550_fns,
       .deviceProbe = lpc24xx_uart_probe_1,
       .pDeviceFlow = NULL,
@@ -135,7 +135,7 @@ console_tbl Console_Configuration_Ports [] = {
   #ifdef LPC24XX_CONFIG_UART_2
     {
       .sDeviceName = "/dev/ttyS2",
-      .deviceType = SERIAL_NS16550,
+      .deviceType = SERIAL_NS16550_WITH_FDR,
       .pDeviceFns = &ns16550_fns,
       .deviceProbe = lpc24xx_uart_probe_2,
       .pDeviceFlow = NULL,
@@ -156,7 +156,7 @@ console_tbl Console_Configuration_Ports [] = {
   #ifdef LPC24XX_CONFIG_UART_3
     {
       .sDeviceName = "/dev/ttyS3",
-      .deviceType = SERIAL_NS16550,
+      .deviceType = SERIAL_NS16550_WITH_FDR,
       .pDeviceFns = &ns16550_fns,
       .deviceProbe = lpc24xx_uart_probe_3,
       .pDeviceFlow = NULL,
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in b/c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in
index fb7ecc6caf..3b40a3d889 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/bspopts.h.in
@@ -42,7 +42,7 @@
 /* configuration for UART 3 */
 #undef LPC24XX_CONFIG_UART_3
 
-/* peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
+/* clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV) */
 #undef LPC24XX_EMCCLKDIV
 
 /* enable ISSI IS42S32800B configuration for EMC */
@@ -81,7 +81,7 @@
 /* RTC oscillator frequency in Hz */
 #undef LPC24XX_OSCILLATOR_RTC
 
-/* peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
+/* clock divider for default PCLK (PCLK = CCLK / PCLKDIV) */
 #undef LPC24XX_PCLKDIV
 
 /* stop Ethernet controller at start-up to avoid DMA interference */
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/io.h b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
index 03ae472790..f77b44717e 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/io.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/io.h
@@ -147,6 +147,8 @@ rtems_status_code lpc24xx_module_disable(
   lpc24xx_module module
 );
 
+bool lpc24xx_module_is_enabled(lpc24xx_module module);
+
 rtems_status_code lpc24xx_gpio_config(
   unsigned index,
   lpc24xx_gpio_settings settings
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h
index f12af607a6..8c787b75da 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2009-2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2009-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -27,6 +27,8 @@
 #include <bsp/io.h>
 #include <bsp/lpc24xx.h>
 
+#include <limits.h>
+
 #ifdef __cplusplus
 extern "C" {
 #endif /* __cplusplus */
@@ -35,13 +37,31 @@ extern "C" {
 
 #define LPC_ETH_CONFIG_REG_BASE MAC_BASE_ADDR
 
-#define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
-#define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX 54
+#ifdef ARM_MULTILIB_ARCH_V4
+  #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
+  #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX 54
+
+  #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 10
+  #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX 10
+
+  #define LPC_ETH_CONFIG_UNIT_MULTIPLE 1U
+
+  #define LPC24XX_ETH_RAM_BEGIN 0x7fe00000U
+  #define LPC24XX_ETH_RAM_SIZE (16U * 1024U)
+#else
+  #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16
+  #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX
 
-#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 10
-#define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX 10
+  #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32
+  #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX
 
-#define LPC_ETH_CONFIG_UNIT_MULTIPLE 1U
+  #define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U
+
+  #define LPC_ETH_CONFIG_USE_TRANSMIT_DMA
+
+  #define LPC24XX_ETH_RAM_BEGIN 0x20000000U
+  #define LPC24XX_ETH_RAM_SIZE (32U * 1024U)
+#endif
 
 #ifdef LPC24XX_ETHERNET_RMII
   #define LPC_ETH_CONFIG_RMII
@@ -72,9 +92,6 @@ extern "C" {
   }
 #endif
 
-#define LPC24XX_ETH_RAM_BEGIN 0x7fe00000U
-#define LPC24XX_ETH_RAM_SIZE (16U * 1024U)
-
 static char *lpc_eth_config_alloc_table_area(size_t size)
 {
   if (size < LPC24XX_ETH_RAM_SIZE) {
diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
index 29b234f62b..9d6173f741 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
+++ b/c/src/lib/libbsp/arm/lpc24xx/include/start-config.h
@@ -34,6 +34,20 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @brief Pico seconds @a ps to clock ticks for clock frequency @a f.
+ */
+#define LPC24XX_PS_TO_CLK(ps, f) \
+  (((((uint64_t) (ps)) * ((uint64_t) (f))) + 1000000000000ULL - 1ULL) \
+    / 1000000000000ULL)
+
+/**
+ * @brief Pico seconds @a ps to EMCCLK clock ticks adjusted by @a m.
+ */
+#define LPC24XX_PS_TO_EMCCLK(ps, m) \
+  (LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) > (m) ? \
+    LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) - (m) : 0)
+
 typedef struct {
   uint32_t refresh;
   uint32_t readconfig;
@@ -91,7 +105,10 @@ extern BSP_START_DATA_SECTION const size_t
   lpc24xx_start_config_emc_static_chip_count;
 
 extern BSP_START_DATA_SECTION const ARMV7M_MPU_Region
-  lpc24xx_start_config_mpu_regions [LPC24XX_MPU_REGION_COUNT];
+  lpc24xx_start_config_mpu_region [];
+
+extern BSP_START_DATA_SECTION const size_t
+  lpc24xx_start_config_mpu_region_count;
 
 #ifdef __cplusplus
 }
diff --git a/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_ram.cfg b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_ram.cfg
new file mode 100644
index 0000000000..a3cf1f0816
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_ram.cfg
@@ -0,0 +1,5 @@
+#
+#  Config file for LPC17XX (PLX800).
+#
+
+include $(RTEMS_ROOT)/make/custom/lpc17xx.inc
diff --git a/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_rom_int.cfg b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_rom_int.cfg
new file mode 100644
index 0000000000..a3cf1f0816
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/make/custom/lpc17xx_plx800_rom_int.cfg
@@ -0,0 +1,5 @@
+#
+#  Config file for LPC17XX (PLX800).
+#
+
+include $(RTEMS_ROOT)/make/custom/lpc17xx.inc
diff --git a/c/src/lib/libbsp/arm/lpc24xx/misc/io.c b/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
index 1141b718ad..ad74164b80 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/misc/io.c
@@ -327,6 +327,30 @@ rtems_status_code lpc24xx_module_disable(
   );
 }
 
+bool lpc24xx_module_is_enabled(lpc24xx_module module)
+{
+  bool enabled = false;
+
+  if ((unsigned) module < LPC24XX_MODULE_COUNT) {
+    bool has_power = lpc24xx_module_table [module].power;
+
+    if (has_power) {
+      unsigned index = lpc24xx_module_table [module].index;
+      #ifdef ARM_MULTILIB_ARCH_V4
+        uint32_t pconp = PCONP;
+      #else
+        uint32_t pconp = LPC17XX_SCB.pconp;
+      #endif
+
+      enabled = (pconp & (1U << index)) != 0;
+    } else {
+      enabled = true;
+    }
+  }
+
+  return enabled;
+}
+
 typedef rtems_status_code (*lpc24xx_pin_visitor)(
   #ifdef ARM_MULTILIB_ARCH_V4
     volatile uint32_t *pinsel,
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
index 56373ec80f..3b198534c6 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c
@@ -495,16 +495,15 @@ static BSP_START_TEXT_SECTION void lpc24xx_init_mpu(void)
 {
   #ifdef ARM_MULTILIB_ARCH_V7M
     volatile ARMV7M_MPU *mpu = _ARMV7M_MPU;
-    size_t n = sizeof(lpc24xx_start_config_mpu_regions)
-      / sizeof(lpc24xx_start_config_mpu_regions [0]);
+    size_t region_count = lpc24xx_start_config_mpu_region_count;
     size_t i = 0;
 
-    for (i = 0; i < n; ++i) {
-      mpu->rbar = lpc24xx_start_config_mpu_regions [i].rbar;
-      mpu->rasr = lpc24xx_start_config_mpu_regions [i].rasr;
+    for (i = 0; i < region_count; ++i) {
+      mpu->rbar = lpc24xx_start_config_mpu_region [i].rbar;
+      mpu->rasr = lpc24xx_start_config_mpu_region [i].rasr;
     }
 
-    if (n > 0) {
+    if (region_count > 0) {
       mpu->ctrl = ARMV7M_MPU_CTRL_ENABLE;
     }
   #endif
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram
index 88aaef7aed..79065bb2a7 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram
@@ -22,4 +22,4 @@ REGION_ALIAS ("REGION_BSS", RAM_EXT);
 REGION_ALIAS ("REGION_WORK", RAM_EXT);
 REGION_ALIAS ("REGION_STACK", RAM_INT);
 
-INCLUDE linkcmds.armv7
+INCLUDE linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int
index 5fa6a800d4..bae5dc86c1 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int
@@ -12,14 +12,14 @@ REGION_ALIAS ("REGION_TEXT", ROM_INT);
 REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
 REGION_ALIAS ("REGION_RODATA", ROM_INT);
 REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
-REGION_ALIAS ("REGION_DATA", RAM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
 REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
 REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
 REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
 REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
 REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
-REGION_ALIAS ("REGION_BSS", RAM_INT);
-REGION_ALIAS ("REGION_WORK", RAM_INT);
-REGION_ALIAS ("REGION_STACK", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_EXT);
 
-INCLUDE linkcmds.armv7
+INCLUDE linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram
new file mode 100644
index 0000000000..1f9e6b3048
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram
@@ -0,0 +1,31 @@
+/**
+ * @file
+ *
+ * @brief Memory map for PLX800 (LPC1778).
+ */
+
+MEMORY {
+	ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT : ORIGIN = 0x10000000, LENGTH = 64k
+	RAM_PER : ORIGIN = 0x20000000, LENGTH = 32k
+	ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
+	RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
+}
+
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int
new file mode 100644
index 0000000000..02750e7a60
--- /dev/null
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int
@@ -0,0 +1,31 @@
+/**
+ * @file
+ *
+ * @brief Memory map for PLX800 (LPC1778).
+ */
+
+MEMORY {
+	ROM_INT : ORIGIN = 0x00000000, LENGTH = 512k
+	RAM_INT : ORIGIN = 0x10000000, LENGTH = 64k
+	RAM_PER : ORIGIN = 0x20000000, LENGTH = 32k
+	ROM_EXT : ORIGIN = 0x80000000, LENGTH = 4M
+	RAM_EXT : ORIGIN = 0xa0000000, LENGTH = 32M
+}
+
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT", RAM_INT);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST_DATA", RAM_INT);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c
index ac3b157014..3637a92d56 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c
@@ -7,7 +7,7 @@
  */
 
 /*
- * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
+ * Copyright (c) 2011-2012 embedded brains GmbH.  All rights reserved.
  *
  *  embedded brains GmbH
  *  Obere Lagerstr. 30
@@ -23,16 +23,27 @@
 #include <bsp/start-config.h>
 #include <bsp/lpc24xx.h>
 
+/*
+ * FIXME: The NXP example code uses different values for the follwing two
+ * defines.  In the NXP example code they depend on the EMCCLK.  It is unclear
+ * how these values are determined.  The values from the NXP example code do
+ * not work.
+ */
+
+/* Use command delayed strategy */
+#define LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT 0x1
+
+#define LPC24XX_EMCDLYCTL_DEFAULT 0x1112
+
 BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
   lpc24xx_start_config_emc_dynamic [] = {
 #if defined(LPC24XX_EMC_MT48LC4M16A2)
   /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */
   {
-    /* Auto-refresh command every 15.6 us */
-    .refresh = 0x46,
+    /* 15.6 us */
+    .refresh = LPC24XX_PS_TO_EMCCLK(15600000, 0) / 16,
 
-    /* Use command delayed strategy */
-    .readconfig = 1,
+    .readconfig = LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT,
 
     /* Precharge command period 20 ns */
     .trp = 1,
@@ -68,93 +79,95 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
     .tmrd = 1
   }
 #elif defined(LPC24XX_EMC_IS42S32800D7)
-  /* Dynamic Memory 0: ISSI IS42S32800D7 at 51612800Hz (tCK = 19.4ns) */
+  /* Dynamic Memory 0: ISSI IS42S32800D7 */
   {
-    /* (n * 16) clock cycles -> 15.5us <= 15.6 us */
-    .refresh = 50,
+    /* 15.6 us */
+    .refresh = LPC24XX_PS_TO_EMCCLK(15600000, 0) / 16,
 
-    /* Use command delayed strategy */
-    .readconfig = 1,
+    .readconfig = LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT,
 
-    /* (n + 1) clock cycles -> 38.8ns >= 20ns */
-    .trp = 1,
+    /* 20ns */
+    .trp = LPC24XX_PS_TO_EMCCLK(20000, 1),
 
-    /* (n + 1) clock cycles -> 58.1ns >= 45ns */
-    .tras = 2,
+    /* 45ns */
+    .tras = LPC24XX_PS_TO_EMCCLK(45000, 1),
 
-    /* (n + 1) clock cycles -> 77.5ns >= 70ns (tXSR) */
-    .tsrex = 3,
+    /* 70ns (tXSR) */
+    .tsrex = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-    /* (n + 1) clock cycles -> 38.8ns >= 20ns (tRCD) */
-    .tapr = 1,
+    /* 20ns (tRCD) */
+    .tapr = LPC24XX_PS_TO_EMCCLK(20000, 1),
 
     /* n clock cycles -> 38.8ns >= 35ns */
-    .tdal = 2,
+    .tdal = LPC24XX_PS_TO_EMCCLK(35000, 0),
+
+    /* 14ns (tDPL) */
+    .twr = LPC24XX_PS_TO_EMCCLK(14000, 1),
 
-    /* (n + 1) clock cycles = 19.4ns >= 14ns (tDPL) */
-    .twr = 0,
+    /* 67.5ns */
+    .trc = LPC24XX_PS_TO_EMCCLK(67500, 1),
 
-    /* (n + 1) clock cycles = 77.5ns >= 67.5ns */
-    .trc = 3,
+    /* 67.5ns (tRC) */
+    .trfc = LPC24XX_PS_TO_EMCCLK(67500, 1),
 
-    /* (n + 1) clock cycles = 77.5ns >= 67.5ns (tRC) */
-    .trfc = 3,
+    /* 70ns */
+    .txsr = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-    /* (n + 1) clock cycles = 77.5ns >= 70ns */
-    .txsr = 3,
+    /* 14ns */
+    .trrd = LPC24XX_PS_TO_EMCCLK(14000, 1),
 
-    /* (n + 1) clock cycles = 19.4ns >= 14ns */
-    .trrd = 0,
+    /* 14ns */
+    .tmrd = LPC24XX_PS_TO_EMCCLK(14000, 1),
 
-    /* (n + 1) clock cycles = 19.4ns >= 14ns */
-    .tmrd = 0
+    .emcdlyctl = LPC24XX_EMCDLYCTL_DEFAULT
   }
 #elif defined(LPC24XX_EMC_W9825G2JB75I)
-  /* Dynamic Memory 0: Winbond W9825G2JB75I at 51612800Hz (tCK = 19.4ns) */
+  /* Dynamic Memory 0: Winbond W9825G2JB75I */
   {
-    /* (n * 16) clock cycles -> 15.5us <= 15.6 us */
-    .refresh = 50,
+    /* 15.6 us */
+    .refresh = LPC24XX_PS_TO_EMCCLK(15600000, 0) / 16,
 
-    /* Use command delayed strategy */
-    .readconfig = 1,
+    .readconfig = LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT,
 
-    /* (n + 1) clock cycles -> 38.8ns >= 20ns */
-    .trp = 1,
+    /* 20ns */
+    .trp = LPC24XX_PS_TO_EMCCLK(20000, 1),
 
-    /* (n + 1) clock cycles -> 58.1ns >= 45ns */
-    .tras = 2,
+    /* 45ns */
+    .tras = LPC24XX_PS_TO_EMCCLK(45000, 1),
 
-    /* (n + 1) clock cycles -> 77.5ns >= 75ns (tXSR) */
-    .tsrex = 3,
+    /* 75ns (tXSR) */
+    .tsrex = LPC24XX_PS_TO_EMCCLK(75000, 1),
 
-    /* (n + 1) clock cycles -> 38.8ns >= 20ns (tRCD) */
-    .tapr = 1,
+    /* 20ns (tRCD) */
+    .tapr = LPC24XX_PS_TO_EMCCLK(20000, 1),
 
-    /* n clock cycles -> 77.5ns >= tWR + tRP -> 2 * tCK + 20ns */
-    .tdal = 4,
+    /* tWR + tRP -> 2 * tCK + 20ns */
+    .tdal = 2 + LPC24XX_PS_TO_EMCCLK(20000, 0),
 
     /* (n + 1) clock cycles == 2 * tCK */
     .twr = 1,
 
-    /* (n + 1) clock cycles = 77.5ns >= 65ns */
-    .trc = 3,
+    /* 65ns */
+    .trc = LPC24XX_PS_TO_EMCCLK(65000, 1),
 
-    /* (n + 1) clock cycles = 77.5ns >= 65ns (tRC) */
-    .trfc = 3,
+    /* 65ns (tRC) */
+    .trfc = LPC24XX_PS_TO_EMCCLK(65000, 1),
 
-    /* (n + 1) clock cycles = 77.5ns >= 75ns */
-    .txsr = 3,
+    /* 75ns */
+    .txsr = LPC24XX_PS_TO_EMCCLK(50000, 1),
 
     /* (n + 1) clock cycles == 2 * tCK */
     .trrd = 1,
 
     /* (n + 1) clock cycles == 2 * tCK (tRSC)*/
-    .tmrd = 1
+    .tmrd = 1,
+
+    .emcdlyctl = LPC24XX_EMCDLYCTL_DEFAULT
   }
 #elif defined(LPC24XX_EMC_K4S561632E)
   {
     .refresh = 35,
-    .readconfig = 1,
+    .readconfig = LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT,
     .trp = 2,
     .tras = 4,
     .tsrex = 5,
@@ -168,71 +181,47 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
     .tmrd = 2
   }
 #elif defined(LPC24XX_EMC_IS42S32800B)
-  #if LPC24XX_EMCCLK == 72000000U
-    {
-      /* tCK = 13.888ns at 72MHz */
-
-      /* (n * 16) clock cycles -> 15.556us <= 15.6us */
-      .refresh = 70,
-
-      .readconfig = 1,
-
-      /* (n + 1) clock cycles -> 27.8ns >= 20ns */
-      .trp = 1,
-
-      /* (n + 1) clock cycles -> 55.5ns >= 45ns */
-      .tras = 3,
-
-      /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */
-      .tsrex = 5,
-
-      /* (n + 1) clock cycles -> 41.7ns >= FIXME */
-      .tapr = 2,
-
-      /* n clock cycles -> 55.5ns >= tWR + tRP = 47.8ns */
-      .tdal = 4,
-
-      /* (n + 1) clock cycles == 2 * tCK */
-      .twr = 1,
-
-      /* (n + 1) clock cycles -> 83.3ns >= 70ns */
-      .trc = 5,
-
-      /* (n + 1) clock cycles -> 83.3ns >= 70ns */
-      .trfc = 5,
-
-      /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */
-      .txsr = 5,
-
-      /* (n + 1) clock cycles -> 27.8ns >= 14ns */
-      .trrd = 1,
-
-      /* (n + 1) clock cycles == 2 * tCK */
-      .tmrd = 1,
-
-      /* FIXME */
-      .emcdlyctl = 0x1112
-    }
-  #elif LPC24XX_EMCCLK == 60000000U
-    {
-      .refresh = 0x3a,
-      .readconfig = 1,
-      .trp = 1,
-      .tras = 3,
-      .tsrex = 5,
-      .tapr = 2,
-      .tdal = 3,
-      .twr = 1,
-      .trc = 4,
-      .trfc = 4,
-      .txsr = 5,
-      .trrd = 1,
-      .tmrd = 1,
-      .emcdlyctl = 0x1112
-    }
-  #else
-    #error "unexpected EMCCLK"
-  #endif
+  {
+    /* 15.6us */
+    .refresh = LPC24XX_PS_TO_EMCCLK(15600000, 0) / 16,
+
+    .readconfig = LPC24XX_EMC_DYNAMIC_READCONFIG_DEFAULT,
+
+    /* 20ns */
+    .trp = LPC24XX_PS_TO_EMCCLK(20000, 1),
+
+    /* 45ns */
+    .tras = LPC24XX_PS_TO_EMCCLK(45000, 1),
+
+    /* 70ns (tRC) */
+    .tsrex = LPC24XX_PS_TO_EMCCLK(70000, 1),
+
+    /* FIXME */
+    .tapr = LPC24XX_PS_TO_EMCCLK(40000, 1),
+
+    /* tWR + tRP -> 2 * tCK + 20ns */
+    .tdal = 2 + LPC24XX_PS_TO_EMCCLK(20000, 0),
+
+    /* (n + 1) clock cycles == 2 * tCK */
+    .twr = 1,
+
+    /* 70ns */
+    .trc = LPC24XX_PS_TO_EMCCLK(70000, 1),
+
+    /* 70ns */
+    .trfc = LPC24XX_PS_TO_EMCCLK(70000, 1),
+
+    /* 70ns (tRC) */
+    .txsr = LPC24XX_PS_TO_EMCCLK(70000, 1),
+
+    /* 14ns */
+    .trrd = LPC24XX_PS_TO_EMCCLK(14000, 1),
+
+    /* (n + 1) clock cycles == 2 * tCK */
+    .tmrd = 1,
+
+    .emcdlyctl = LPC24XX_EMCDLYCTL_DEFAULT
+  }
 #endif
 };
 
@@ -252,7 +241,8 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config
     .mode = 0xa0000000 | (0x23 << (1 + 2 + 8))
   }
 #elif defined(LPC24XX_EMC_W9825G2JB75I) \
-  || defined(LPC24XX_EMC_IS42S32800D7)
+  || defined(LPC24XX_EMC_IS42S32800D7) \
+  || defined(LPC24XX_EMC_IS42S32800B)
   {
     .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0,
 
@@ -272,23 +262,6 @@ BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config
     .rascas = EMC_DYN_RASCAS_RAS(3) | EMC_DYN_RASCAS_CAS(3, 0),
     .mode = 0xa0000000 | (0x33 << 12)
   }
-#elif defined(LPC24XX_EMC_IS42S32800B)
-  {
-    .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0,
-
-    /* 256MBit, 8Mx32, 4 banks, row = 12, column = 9, RBC */
-    .config = 0x4480,
-
-    #if LPC24XX_EMCCLK == 72000000U
-      .rascas = EMC_DYN_RASCAS_RAS(3) | EMC_DYN_RASCAS_CAS(3, 0),
-      .mode = 0xa0000000 | (0x32 << (2 + 2 + 9))
-    #elif LPC24XX_EMCCLK == 60000000U
-      .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0),
-      .mode = 0xa0000000 | (0x22 << (2 + 2 + 9))
-    #else
-      #error "unexpected EMCCLK"
-    #endif
-  }
 #endif
 };
 
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c
index f8fa4eff6e..3f96602d4a 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c
@@ -65,7 +65,7 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
     }
   }
 #elif defined(LPC24XX_EMC_M29W320E70)
-  /* Static Memory 0: M29W320E70 at 51612800Hz (tCK = 19.4ns) */
+  /* Static Memory 0: M29W320E70 */
   {
     .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0,
     .config = {
@@ -75,27 +75,27 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
        */
       .config = 0x81,
 
-      /* (n + 1) clock cycles -> 38.8ns >= 30ns (tWHWL) */
-      .waitwen = 1,
+      /* 30ns (tWHWL) */
+      .waitwen = LPC24XX_PS_TO_EMCCLK(30000, 1),
 
-      /* (n + 1) clock cycles -> 19.4ns >= 0ns */
-      .waitoen = 0,
+      /* 0ns */
+      .waitoen = LPC24XX_PS_TO_EMCCLK(0, 1),
 
-      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */
-      .waitrd = 3,
+      /* 70ns (tAVQV, tELQV) */
+      .waitrd = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */
-      .waitpage = 3,
+      /* 70ns (tAVQV, tELQV) */
+      .waitpage = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-      /* (n + 2) clock cycles -> 58.1ns >= 45ns (tWLWH) */
-      .waitwr = 1,
+      /* max(30ns (tWHWL) + 45ns (tWLWH), 70ns (tAVAV)) */
+      .waitwr = LPC24XX_PS_TO_EMCCLK(75000, 2),
 
-      /* (n + 1) clock cycles -> 38.8ns >= 25ns (tEHQZ) */
-      .waitrun = 1
+      /* 25ns (tEHQZ) */
+      .waitrun = LPC24XX_PS_TO_EMCCLK(25000, 1)
     }
   }
 #elif defined(LPC24XX_EMC_SST39VF3201)
-  /* Static Memory 0: SST39VF3201 at 51612800Hz (tCK = 19.4ns) */
+  /* Static Memory 0: SST39VF3201 */
   {
     .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0,
     .config = {
@@ -105,23 +105,23 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
        */
       .config = 0x81,
 
-      /* (n + 1) clock cycles -> 19.4ns >= 0ns (tCS, tAS) */
-      .waitwen = 0,
+      /* 0ns (tCS, tAS) */
+      .waitwen = LPC24XX_PS_TO_EMCCLK(0, 1),
 
-      /* (n + 1) clock cycles -> 19.4ns >= 0ns (tOES) */
-      .waitoen = 0,
+      /* 0ns (tOES) */
+      .waitoen = LPC24XX_PS_TO_EMCCLK(0, 1),
 
-      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
-      .waitrd = 2,
+      /* 70ns (tRC) */
+      .waitrd = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
-      .waitpage = 2,
+      /* 70ns (tRC) */
+      .waitpage = LPC24XX_PS_TO_EMCCLK(70000, 1),
 
-      /* (n + 2) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
-      .waitwr = 0,
+      /* 20ns (tCHZ, TOHZ) */
+      .waitwr = LPC24XX_PS_TO_EMCCLK(20000, 2),
 
-      /* (n + 1) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
-      .waitrun = 1
+      /* 20ns (tCHZ, TOHZ) */
+      .waitrun = LPC24XX_PS_TO_EMCCLK(20000, 1)
     }
   }
 #endif
diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c
index b428de655d..b2cffbd2fc 100644
--- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c
+++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-mpu.c
@@ -24,44 +24,63 @@
 
 #ifdef ARM_MULTILIB_ARCH_V7M
   BSP_START_DATA_SECTION const ARMV7M_MPU_Region
-    lpc24xx_start_config_mpu_regions [LPC24XX_MPU_REGION_COUNT] = {
-      ARMV7M_MPU_REGION_INITIALIZER(
-        0,
-        0x00000000,
-        ARMV7M_MPU_SIZE_512_KB,
-        ARMV7M_MPU_ATTR_RX
-      ),
-      ARMV7M_MPU_REGION_INITIALIZER(
-        1,
-        0x10000000,
-        ARMV7M_MPU_SIZE_64_KB,
-        ARMV7M_MPU_ATTR_RWX
-      ),
-      ARMV7M_MPU_REGION_INITIALIZER(
-        2,
-        0x20000000,
-        ARMV7M_MPU_SIZE_32_KB,
-        ARMV7M_MPU_ATTR_RWX
-      ),
-      ARMV7M_MPU_REGION_INITIALIZER(
-        3,
-        0xa0000000,
-        ARMV7M_MPU_SIZE_32_MB,
-        ARMV7M_MPU_ATTR_RWX
-      ),
-      ARMV7M_MPU_REGION_INITIALIZER(
-        4,
-        0x20080000,
-        ARMV7M_MPU_SIZE_128_KB,
-        ARMV7M_MPU_ATTR_IO
-      ),
-      ARMV7M_MPU_REGION_INITIALIZER(
-        5,
-        0x40000000,
-        ARMV7M_MPU_SIZE_1_MB,
-        ARMV7M_MPU_ATTR_IO
-      ),
-      ARMV7M_MPU_REGION_DISABLED_INITIALIZER(6),
-      ARMV7M_MPU_REGION_DISABLED_INITIALIZER(7)
+    lpc24xx_start_config_mpu_region [] = {
+      #if defined(LPC24XX_EMC_IS42S32800D7) \
+        || defined(LPC24XX_EMC_W9825G2JB75I) \
+        || defined(LPC24XX_EMC_IS42S32800B)
+        ARMV7M_MPU_REGION_INITIALIZER(
+          0,
+          0x00000000,
+          ARMV7M_MPU_SIZE_512_KB,
+          ARMV7M_MPU_ATTR_RX
+        ),
+        ARMV7M_MPU_REGION_INITIALIZER(
+          1,
+          0x10000000,
+          ARMV7M_MPU_SIZE_64_KB,
+          ARMV7M_MPU_ATTR_RWX
+        ),
+        ARMV7M_MPU_REGION_INITIALIZER(
+          2,
+          0x20000000,
+          ARMV7M_MPU_SIZE_32_KB,
+          ARMV7M_MPU_ATTR_RWX
+        ),
+        ARMV7M_MPU_REGION_INITIALIZER(
+          3,
+          0xa0000000,
+          ARMV7M_MPU_SIZE_32_MB,
+          ARMV7M_MPU_ATTR_RWX
+        ),
+        ARMV7M_MPU_REGION_INITIALIZER(
+          4,
+          0x20080000,
+          ARMV7M_MPU_SIZE_128_KB,
+          ARMV7M_MPU_ATTR_IO
+        ),
+        ARMV7M_MPU_REGION_INITIALIZER(
+          5,
+          0x40000000,
+          ARMV7M_MPU_SIZE_1_MB,
+          ARMV7M_MPU_ATTR_IO
+        ),
+        #if defined(LPC24XX_EMC_M29W320E70) \
+          || defined(LPC24XX_EMC_SST39VF3201)
+          ARMV7M_MPU_REGION_INITIALIZER(
+            6,
+            0x80000000,
+            ARMV7M_MPU_SIZE_4_MB,
+            ARMV7M_MPU_ATTR_RWX
+          ),
+        #else
+          ARMV7M_MPU_REGION_DISABLED_INITIALIZER(6),
+        #endif
+        ARMV7M_MPU_REGION_DISABLED_INITIALIZER(7)
+     #endif
   };
+
+  BSP_START_DATA_SECTION const size_t
+    lpc24xx_start_config_mpu_region_count =
+      sizeof(lpc24xx_start_config_mpu_region)
+        / sizeof(lpc24xx_start_config_mpu_region [0]);
 #endif
diff --git a/c/src/lib/libbsp/arm/preinstall.am b/c/src/lib/libbsp/arm/preinstall.am
index b6959d52f1..3e66ebea32 100644
--- a/c/src/lib/libbsp/arm/preinstall.am
+++ b/c/src/lib/libbsp/arm/preinstall.am
@@ -35,7 +35,7 @@ $(PROJECT_LIB)/linkcmds.armv4: shared/startup/linkcmds.armv4 $(PROJECT_LIB)/$(di
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv4
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv4
 
-$(PROJECT_LIB)/linkcmds.armv7: shared/startup/linkcmds.armv7 $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv7
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv7
+$(PROJECT_LIB)/linkcmds.armv7m: shared/startup/linkcmds.armv7m $(PROJECT_LIB)/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.armv7m
+PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.armv7m
 
diff --git a/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv7 b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv7m
index ecdb55a184..ecdb55a184 100644
--- a/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv7
+++ b/c/src/lib/libbsp/arm/shared/startup/linkcmds.armv7m
diff --git a/c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4 b/c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4
index a68846ec39..82195056b3 100644
--- a/c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4
+++ b/c/src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4
@@ -19,4 +19,4 @@ REGION_ALIAS ("REGION_BSS", RAM_INT);
 REGION_ALIAS ("REGION_WORK", RAM_INT);
 REGION_ALIAS ("REGION_STACK", RAM_INT);
 
-INCLUDE linkcmds.armv7
+INCLUDE linkcmds.armv7m
diff --git a/c/src/libchip/serial/ns16550.c b/c/src/libchip/serial/ns16550.c
index a8fdf983c7..3277b7ef0d 100644
--- a/c/src/libchip/serial/ns16550.c
+++ b/c/src/libchip/serial/ns16550.c
@@ -95,6 +95,40 @@ console_fns ns16550_fns_polled = {
   false                                /* deviceOutputUsesInterrupts */
 };
 
+static uint32_t NS16550_GetBaudDivisor(const console_tbl *c, uint32_t baud)
+{
+  uint32_t clock = c->ulClock;
+  uint32_t baudDivisor = (clock != 0 ? clock : 115200) / (baud * 16);
+
+  if (c->deviceType == SERIAL_NS16550_WITH_FDR) {
+    uint32_t fractionalDivider = 0x10;
+    uint32_t err = baud;
+    uint32_t mulVal;
+    uint32_t divAddVal;
+
+    clock /= 16 * baudDivisor;
+    for (mulVal = 1; mulVal < 16; ++mulVal) {
+      for (divAddVal = 0; divAddVal < mulVal; ++divAddVal) {
+        uint32_t actual = (mulVal * clock) / (mulVal + divAddVal);
+        uint32_t newErr = actual > baud ? actual - baud : baud - actual;
+
+        if (newErr < err) {
+          err = newErr;
+          fractionalDivider = (mulVal << 4) | divAddVal;
+        }
+      }
+    }
+
+    (*c->setRegister)(
+      c->ulCtrlPort1,
+      NS16550_FRACTIONAL_DIVIDER,
+      fractionalDivider
+    );
+  }
+
+  return baudDivisor;
+}
+
 /*
  *  ns16550_init
  */
@@ -133,10 +167,7 @@ NS16550_STATIC void ns16550_init(int minor)
 
   /* Set the divisor latch and set the baud rate. */
 
-  ulBaudDivisor = NS16550_Baud(
-    (uint32_t) c->ulClock,
-    (uint32_t) ((uintptr_t)c->pDeviceParams)
-  );
+  ulBaudDivisor = NS16550_GetBaudDivisor(c, (uintptr_t) c->pDeviceParams);
   ucDataByte = SP_LINE_DLAB;
   (*setReg)(pNS16550, NS16550_LINE_CONTROL, ucDataByte);
 
@@ -413,23 +444,18 @@ NS16550_STATIC int ns16550_set_attributes(
   setRegister_f           setReg;
   getRegister_f           getReg;
   uint32_t                Irql;
+  const console_tbl      *c = Console_Port_Tbl [minor];
 
-  pNS16550 = Console_Port_Tbl[minor]->ulCtrlPort1;
-  setReg   = Console_Port_Tbl[minor]->setRegister;
-  getReg   = Console_Port_Tbl[minor]->getRegister;
+  pNS16550 = c->ulCtrlPort1;
+  setReg   = c->setRegister;
+  getReg   = c->getRegister;
 
   /*
    *  Calculate the baud rate divisor
    */
 
-  baud_requested = t->c_cflag & CBAUD;
-  if (!baud_requested)
-    baud_requested = B9600;              /* default to 9600 baud */
-
-  ulBaudDivisor = NS16550_Baud(
-    (uint32_t) Console_Port_Tbl[minor]->ulClock,
-    rtems_termios_baud_to_number(baud_requested)
-  );
+  baud_requested = rtems_termios_baud_to_number(t->c_cflag);
+  ulBaudDivisor = NS16550_GetBaudDivisor(c, baud_requested);
 
   ucLineControl = 0;
 
diff --git a/c/src/libchip/serial/ns16550_p.h b/c/src/libchip/serial/ns16550_p.h
index be99cf1475..1e261612f2 100644
--- a/c/src/libchip/serial/ns16550_p.h
+++ b/c/src/libchip/serial/ns16550_p.h
@@ -49,6 +49,7 @@ extern "C" {
 #define NS16550_LINE_STATUS      5
 #define NS16550_MODEM_STATUS     6
 #define NS16550_SCRATCH_PAD      7
+#define NS16550_FRACTIONAL_DIVIDER 10
 
 /*
  * Define serial port interrupt enable register structure.
@@ -106,13 +107,6 @@ extern "C" {
 #define EIGHT_BITS 0x3                  /* eight bits per character */
 
 /*
- * Line speed divisor definition.
- */
-
-#define NS16550_Baud(_clock, _baud_rate) \
-  ((((_clock) == 0) ? 115200 : (_clock))/(_baud_rate*16))
-
-/*
  * Define serial port modem control register structure.
  */
 
diff --git a/c/src/libchip/serial/serial.h b/c/src/libchip/serial/serial.h
index 7fe1da4f3e..6faa4d34a0 100644
--- a/c/src/libchip/serial/serial.h
+++ b/c/src/libchip/serial/serial.h
@@ -104,6 +104,8 @@ typedef struct _console_flow {
 typedef enum {
   SERIAL_MC68681,              /* Motorola MC68681 or Exar 88681 */
   SERIAL_NS16550,              /* National Semiconductor NS16550 */
+  SERIAL_NS16550_WITH_FDR,     /* National Semiconductor NS16550
+                                  with Fractional Divider Register (FDR) */
   SERIAL_Z85C30,               /* Zilog Z85C30 */
   SERIAL_CUSTOM                /* BSP specific driver */
 } console_devs;