diff options
| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2023-02-10 15:28:33 -0600 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2023-02-14 08:33:52 -0600 |
| commit | b44e26baa7e85aa178de2ea276f44891cb8baa8d (patch) | |
| tree | 0615f75782cfbe70fc62914d103ff160b0629d1a | |
| parent | build: Remove superfluous attribute (diff) | |
| download | rtems-b44e26baa7e85aa178de2ea276f44891cb8baa8d.tar.bz2 | |
bsps/aarch64: Flush cache before disabling MMU
To ensure data consistency, the cache much be flushed before disabling
the MMU. When the MMU is disabled, all accesses are treated as
non-cachced and thus will bypass the cache.
| -rw-r--r-- | bsps/aarch64/include/bsp/aarch64-mmu.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/bsps/aarch64/include/bsp/aarch64-mmu.h b/bsps/aarch64/include/bsp/aarch64-mmu.h index ebc224b9e1..2101ef4ae0 100644 --- a/bsps/aarch64/include/bsp/aarch64-mmu.h +++ b/bsps/aarch64/include/bsp/aarch64-mmu.h @@ -420,7 +420,13 @@ aarch64_mmu_disable( void ) { uint64_t sctlr; - /* Enable MMU and cache */ + /* + * Flush data cache before disabling the MMU. While the MMU is disabled, all + * accesses are treated as uncached device memory. + */ + rtems_cache_flush_entire_data(); + + /* Disable MMU */ sctlr = _AArch64_Read_sctlr_el1(); sctlr &= ~(AARCH64_SCTLR_EL1_M); _AArch64_Write_sctlr_el1( sctlr ); |