score: Remove obsolete defines

The thread dispatch inline option is no longer used.

18 files changed, 0 insertions, 281 deletions

diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 4cdca73838..736898adc6 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -97,13 +97,6 @@
  */
 /**@{**/
 
-/* If someone uses THUMB we assume she wants minimal code size */
-#ifdef __thumb__
-  #define CPU_INLINE_ENABLE_DISPATCH FALSE
-#else
-  #define CPU_INLINE_ENABLE_DISPATCH TRUE
-#endif
-
 #if defined(__ARMEL__)
   #define CPU_BIG_ENDIAN FALSE
   #define CPU_LITTLE_ENDIAN TRUE
diff --git a/cpukit/score/cpu/bfin/rtems/score/cpu.h b/cpukit/score/cpu/bfin/rtems/score/cpu.h
index 1437277dc5..30999c2a9c 100644
--- a/cpukit/score/cpu/bfin/rtems/score/cpu.h
+++ b/cpukit/score/cpu/bfin/rtems/score/cpu.h
@@ -31,29 +31,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /**
- * Should the calls to @ref _Thread_Enable_dispatch be inlined?
- *
- * If TRUE, then they are inlined.
- * If FALSE, then a subroutine call is made.
- *
- * This conditional is an example of the classic trade-off of size
- * versus speed.  Inlining the call (TRUE) typically increases the
- * size of RTEMS while speeding up the enabling of dispatching.
- *
- * @note In general, the @ref _Thread_Dispatch_disable_level will
- * only be 0 or 1 unless you are in an interrupt handler and that
- * interrupt handler invokes the executive.]  When not inlined
- * something calls @ref _Thread_Enable_dispatch which in turns calls
- * @ref _Thread_Dispatch.  If the enable dispatch is inlined, then
- * one subroutine call is avoided entirely.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/**
  * Does RTEMS manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/epiphany/rtems/score/cpu.h b/cpukit/score/cpu/epiphany/rtems/score/cpu.h
index 2954628a58..4c9d3fceea 100644
--- a/cpukit/score/cpu/epiphany/rtems/score/cpu.h
+++ b/cpukit/score/cpu/epiphany/rtems/score/cpu.h
@@ -50,26 +50,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- *
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Does RTEMS manage a dedicated interrupt stack in software?
  *
  *  If TRUE, then a stack is allocated in _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 8fc62ca6e0..127c12c032 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -32,8 +32,6 @@ extern "C" {
 
 /* conditional compilation parameters */
 
-#define CPU_INLINE_ENABLE_DISPATCH       TRUE
-
 /*
  *  Does the CPU follow the simple vectored interrupt model?
  *
diff --git a/cpukit/score/cpu/lm32/rtems/score/cpu.h b/cpukit/score/cpu/lm32/rtems/score/cpu.h
index 24e56251e9..4c5632477e 100644
--- a/cpukit/score/cpu/lm32/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/rtems/score/cpu.h
@@ -29,29 +29,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /**
- * Should the calls to @ref _Thread_Enable_dispatch be inlined?
- *
- * If TRUE, then they are inlined.
- * If FALSE, then a subroutine call is made.
- *
- * This conditional is an example of the classic trade-off of size
- * versus speed.  Inlining the call (TRUE) typically increases the
- * size of RTEMS while speeding up the enabling of dispatching.
- *
- * NOTE: In general, the @ref _Thread_Dispatch_disable_level will
- * only be 0 or 1 unless you are in an interrupt handler and that
- * interrupt handler invokes the executive.]  When not inlined
- * something calls @ref _Thread_Enable_dispatch which in turns calls
- * @ref _Thread_Dispatch.  If the enable dispatch is inlined, then
- * one subroutine call is avoided entirely.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/**
  * Does RTEMS manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h
index 8a29446e8e..87c7b13eb6 100644
--- a/cpukit/score/cpu/m32c/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h
@@ -45,29 +45,6 @@ extern "C" {
 #define RTEMS_USE_16_BIT_OBJECT
 
 /**
- * Should the calls to @ref _Thread_Enable_dispatch be inlined?
- *
- * If TRUE, then they are inlined.
- * If FALSE, then a subroutine call is made.
- *
- * This conditional is an example of the classic trade-off of size
- * versus speed.  Inlining the call (TRUE) typically increases the
- * size of RTEMS while speeding up the enabling of dispatching.
- *
- * NOTE: In general, the @ref _Thread_Dispatch_disable_level will
- * only be 0 or 1 unless you are in an interrupt handler and that
- * interrupt handler invokes the executive.]  When not inlined
- * something calls @ref _Thread_Enable_dispatch which in turns calls
- * @ref _Thread_Dispatch.  If the enable dispatch is inlined, then
- * one subroutine call is avoided entirely.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/**
  * Does RTEMS manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/m68k/rtems/score/cpu.h b/cpukit/score/cpu/m68k/rtems/score/cpu.h
index 65259e3344..7cb06cabce 100644
--- a/cpukit/score/cpu/m68k/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m68k/rtems/score/cpu.h
@@ -28,8 +28,6 @@ extern "C" {
 
 /* conditional compilation parameters */
 
-#define CPU_INLINE_ENABLE_DISPATCH       TRUE
-
 /*
  *  Does the CPU follow the simple vectored interrupt model?
  *
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h
index c5ea5e3bf1..b54bd6cf37 100644
--- a/cpukit/score/cpu/mips/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/rtems/score/cpu.h
@@ -62,25 +62,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Does RTEMS manage a dedicated interrupt stack in software?
  *
  *  If TRUE, then a stack is allocated in _Interrupt_Manager_initialization.
diff --git a/cpukit/score/cpu/moxie/rtems/score/cpu.h b/cpukit/score/cpu/moxie/rtems/score/cpu.h
index 9d83d7aaf0..b89766bacd 100644
--- a/cpukit/score/cpu/moxie/rtems/score/cpu.h
+++ b/cpukit/score/cpu/moxie/rtems/score/cpu.h
@@ -32,28 +32,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- *
- *  MOXIE Specific Information:
- *
- *  XXX
- */
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Should this target use 16 or 32 bit object Ids?
  *
  */
diff --git a/cpukit/score/cpu/nios2/rtems/score/cpu.h b/cpukit/score/cpu/nios2/rtems/score/cpu.h
index 3389a8c51d..984b40705c 100644
--- a/cpukit/score/cpu/nios2/rtems/score/cpu.h
+++ b/cpukit/score/cpu/nios2/rtems/score/cpu.h
@@ -27,11 +27,6 @@ extern "C" {
 #include <rtems/score/types.h>
 #include <rtems/score/nios2.h>
 
-/*
- * TODO: Run the timing tests and figure out what is better.
- */
-#define CPU_INLINE_ENABLE_DISPATCH FALSE
-
 #define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
 
 #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
index 7bacd27727..5950650f72 100644
--- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
@@ -46,29 +46,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /**
- * Should the calls to @ref _Thread_Enable_dispatch be inlined?
- *
- * If TRUE, then they are inlined.
- * If FALSE, then a subroutine call is made.
- *
- * This conditional is an example of the classic trade-off of size
- * versus speed.  Inlining the call (TRUE) typically increases the
- * size of RTEMS while speeding up the enabling of dispatching.
- *
- * NOTE: In general, the @ref _Thread_Dispatch_disable_level will
- * only be 0 or 1 unless you are in an interrupt handler and that
- * interrupt handler invokes the executive.]  When not inlined
- * something calls @ref _Thread_Enable_dispatch which in turns calls
- * @ref _Thread_Dispatch.  If the enable dispatch is inlined, then
- * one subroutine call is avoided entirely.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/**
  * Does RTEMS manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/or1k/rtems/score/cpu.h b/cpukit/score/cpu/or1k/rtems/score/cpu.h
index 4850cd67c7..86cefbc8c5 100644
--- a/cpukit/score/cpu/or1k/rtems/score/cpu.h
+++ b/cpukit/score/cpu/or1k/rtems/score/cpu.h
@@ -40,26 +40,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- *
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Does RTEMS manage a dedicated interrupt stack in software?
  *
  *  If TRUE, then a stack is allocated in _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index 4b14302a2c..7a779b6181 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -50,25 +50,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Does this port provide a CPU dependent IDLE task implementation?
  *
  *  If TRUE, then the routine _CPU_Thread_Idle_body
diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h
index 562fc4402e..1b6685113e 100644
--- a/cpukit/score/cpu/sh/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sh/rtems/score/cpu.h
@@ -37,25 +37,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- *
- *  Basically this is an example of the classic trade-off of size
- *  versus speed.  Inlining the call (TRUE) typically increases the
- *  size of RTEMS while speeding up the enabling of dispatching.
- *  [NOTE: In general, the _Thread_Dispatch_disable_level will
- *  only be 0 or 1 unless you are in an interrupt handler and that
- *  interrupt handler invokes the executive.]  When not inlined
- *  something calls _Thread_Enable_dispatch which in turns calls
- *  _Thread_Dispatch.  If the enable dispatch is inlined, then
- *  one subroutine call is avoided entirely.]
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       FALSE
-
-/*
  *  Does the CPU follow the simple vectored interrupt model?
  *
  *  If TRUE, then RTEMS allocates the vector table it internally manages.
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index a97d330665..6339a79f59 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -54,16 +54,6 @@ extern "C" {
 #endif
 
 /**
- * Should the calls to _Thread_Enable_dispatch be inlined?
- *
- * - If TRUE, then they are inlined.
- * - If FALSE, then a subroutine call is made.
- *
- * On this port, it is faster to inline _Thread_Enable_dispatch.
- */
-#define CPU_INLINE_ENABLE_DISPATCH       TRUE
-
-/**
  * Does the executive manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/sparc64/rtems/score/cpu.h b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
index e0d05b816f..2bcdc230fb 100644
--- a/cpukit/score/cpu/sparc64/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc64/rtems/score/cpu.h
@@ -34,15 +34,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /*
- *  Should the calls to _Thread_Enable_dispatch be inlined?
- *
- *  If TRUE, then they are inlined.
- *  If FALSE, then a subroutine call is made.
- */
-
-#define CPU_INLINE_ENABLE_DISPATCH       TRUE
-
-/*
  *  Does the executive manage a dedicated interrupt stack in software?
  *
  *  If TRUE, then a stack is allocated in _ISR_Handler_initialization.
diff --git a/cpukit/score/cpu/v850/rtems/score/cpu.h b/cpukit/score/cpu/v850/rtems/score/cpu.h
index dc7bbaf0f6..900e6a4c65 100644
--- a/cpukit/score/cpu/v850/rtems/score/cpu.h
+++ b/cpukit/score/cpu/v850/rtems/score/cpu.h
@@ -29,30 +29,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /**
- * Should the calls to @ref _Thread_Enable_dispatch be inlined?
- *
- * If TRUE, then they are inlined.
- * If FALSE, then a subroutine call is made.
- *
- * This conditional is an example of the classic trade-off of size
- * versus speed.  Inlining the call (TRUE) typically increases the
- * size of RTEMS while speeding up the enabling of dispatching.
- *
- * @note In general, the @ref _Thread_Dispatch_disable_level will
- * only be 0 or 1 unless you are in an interrupt handler and that
- * interrupt handler invokes the executive.]  When not inlined
- * something calls @ref _Thread_Enable_dispatch which in turns calls
- * @ref _Thread_Dispatch.  If the enable dispatch is inlined, then
- * one subroutine call is avoided entirely.
- *
- * Port Specific Information:
- *
- * The v850 is a RISC CPU which typically has enough memory to justify
- * the inlining of this method.
- */
-#define CPU_INLINE_ENABLE_DISPATCH       TRUE
-
-/**
  * Does RTEMS manage a dedicated interrupt stack in software?
  *
  * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
diff --git a/cpukit/score/include/rtems/score/threaddispatch.h b/cpukit/score/include/rtems/score/threaddispatch.h
index 4cb223b147..801970ab21 100644
--- a/cpukit/score/include/rtems/score/threaddispatch.h
+++ b/cpukit/score/include/rtems/score/threaddispatch.h
@@ -22,17 +22,6 @@
 extern "C" {
 #endif /* __cplusplus */
 
-#if defined(RTEMS_HEAVY_STACK_DEBUG) || \
-    defined(RTEMS_HEAVY_MALLOC_DEBUG)
-  #define __THREAD_DO_NOT_INLINE_DISABLE_DISPATCH__
-#endif
-
-#if defined(RTEMS_SMP) || \
-   (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \
-   (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1)
-  #define __THREAD_DO_NOT_INLINE_ENABLE_DISPATCH__
-#endif
-
 /**
  * @addtogroup ScoreThread
  *