diff options
| author | Javier Jalle <javier.jalle@gaisler.com> | 2017-01-26 15:31:17 +0100 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2017-03-06 07:54:55 +0100 |
| commit | a545ce26d7470c12d7f6b3e80542e15d1434ba55 (patch) | |
| tree | f9de3c7d5d0501630485003d355bef0fe36e8cbc | |
| parent | bsps/sparc: Updated L2C registers (diff) | |
| download | rtems-a545ce26d7470c12d7f6b3e80542e15d1434ba55.tar.bz2 | |
leon, grpci2: added TIMEOUT interrupt
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c index 9d8dea6c9f..cf2f84fb2f 100644 --- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c +++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c @@ -132,11 +132,12 @@ struct grpci2_regs { #define STS_TRACE (1<<STS_TRACE_BIT) #define STS_CFGERRVALID (1<<STS_CFGERRVALID_BIT) #define STS_CFGERR (1<<STS_CFGERR_BIT) -#define STS_INTTYPE (0x3f<<STS_INTTYPE_BIT) +#define STS_INTTYPE (0x7f<<STS_INTTYPE_BIT) #define STS_INTSTS (0xf<<STS_INTSTS_BIT) #define STS_FDEPTH (0x7<<STS_FDEPTH_BIT) #define STS_FNUM (0x3<<STS_FNUM_BIT) +#define STS_ITIMEOUT (1<<18) #define STS_ISYSERR (1<<17) #define STS_IDMA (1<<16) #define STS_IDMAERR (1<<15) @@ -607,7 +608,7 @@ void grpci2_err_isr(void *arg) struct grpci2_priv *priv = arg; unsigned int sts = priv->regs->sts_cap; - if (sts & (STS_IMSTABRT | STS_ITGTABRT | STS_IPARERR | STS_ISYSERR)) { + if (sts & (STS_IMSTABRT | STS_ITGTABRT | STS_IPARERR | STS_ISYSERR | STS_ITIMEOUT)) { /* A PCI error IRQ ... Error handler unimplemented * add your code here... */ @@ -623,6 +624,9 @@ void grpci2_err_isr(void *arg) if (sts & STS_ISYSERR) { printk("GRPCI2: unhandled System Error IRQ\n"); } + if (sts & STS_ITIMEOUT) { + printk("GRPCI2: unhandled PCI target access timeout IRQ\n"); + } } } |