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authorPeng Fan <van.freenix@gmail.com>2013-04-17 20:54:05 +0800
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-04-17 16:38:48 +0200
commit76de8a8e6b3fb2f1e4f66a477a2d18e38edd595d (patch)
treef28382c49768050e8cf22017e08688e268b41cfa
parentbsp/mpc55xx: Typo (diff)
downloadrtems-76de8a8e6b3fb2f1e4f66a477a2d18e38edd595d.tar.bz2
D-cache clean&&invalidate for Tiny6410
-rw-r--r--c/src/lib/libcpu/arm/shared/include/arm-cp15.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
index 3edc83f733..017c0e3cd0 100644
--- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
+++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h
@@ -609,6 +609,27 @@ static inline void arm_cp15_data_cache_test_and_clean(void)
);
}
+/* In DDI0301H_arm1176jzfs_r0p7_trm
+ * 'MCR p15, 0, <Rd>, c7, c14, 0' means
+ * Clean and Invalidate Entire Data Cache
+ */
+static inline void arm_cp15_data_cache_clean_and_invalidate(void)
+{
+ ARM_SWITCH_REGISTERS;
+
+ uint32_t sbz = 0;
+
+ __asm__ volatile (
+ ARM_SWITCH_TO_ARM
+ "mcr p15, 0, %[sbz], c7, c14, 0\n"
+ ARM_SWITCH_BACK
+ : ARM_SWITCH_OUTPUT
+ : [sbz] "r" (sbz)
+ : "memory"
+ );
+
+}
+
static inline void arm_cp15_data_cache_clean_and_invalidate_line(const void *mva)
{
ARM_SWITCH_REGISTERS;