diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-03-19 16:40:59 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2024-03-20 07:40:41 +0100 |
| commit | 2f5a747dcc1033f9d998dbed9cae113cff9f63fa (patch) | |
| tree | bc0bb6b5d2bb1e35337f2cef2382a768ef12052f | |
| parent | bsps: Add xilinx_zynqmp_lp64_a53 BSP variant (diff) | |
| download | rtems-2f5a747dcc1033f9d998dbed9cae113cff9f63fa.tar.bz2 | |
dev/irq: Optional arm_gic_irq_processor_count()
Provide arm_gic_irq_processor_count() only in SMP configurations.
| -rw-r--r-- | bsps/include/dev/irq/arm-gic-irq.h | 2 | ||||
| -rw-r--r-- | bsps/shared/dev/irq/arm-gicv2.c | 2 | ||||
| -rw-r--r-- | bsps/shared/dev/irq/arm-gicv3.c | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/bsps/include/dev/irq/arm-gic-irq.h b/bsps/include/dev/irq/arm-gic-irq.h index 3c875917df..b3487176f6 100644 --- a/bsps/include/dev/irq/arm-gic-irq.h +++ b/bsps/include/dev/irq/arm-gic-irq.h @@ -113,9 +113,11 @@ static inline rtems_status_code arm_gic_irq_generate_software_irq( return sc; } +#ifdef RTEMS_SMP uint32_t arm_gic_irq_processor_count(void); void arm_gic_irq_initialize_secondary_cpu(void); +#endif #ifdef __cplusplus } diff --git a/bsps/shared/dev/irq/arm-gicv2.c b/bsps/shared/dev/irq/arm-gicv2.c index fcc3d0dfc8..8dc0895956 100644 --- a/bsps/shared/dev/irq/arm-gicv2.c +++ b/bsps/shared/dev/irq/arm-gicv2.c @@ -400,9 +400,11 @@ void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets) | GIC_DIST_ICDSGIR_SGIINTID(vector); } +#ifdef RTEMS_SMP uint32_t arm_gic_irq_processor_count(void) { volatile gic_dist *dist = ARM_GIC_DIST; return GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1; } +#endif diff --git a/bsps/shared/dev/irq/arm-gicv3.c b/bsps/shared/dev/irq/arm-gicv3.c index 4772ff5db4..108d64348a 100644 --- a/bsps/shared/dev/irq/arm-gicv3.c +++ b/bsps/shared/dev/irq/arm-gicv3.c @@ -280,6 +280,7 @@ void arm_gic_trigger_sgi(rtems_vector_number vector, uint32_t targets) gicv3_trigger_sgi(vector, targets); } +#ifdef RTEMS_SMP uint32_t arm_gic_irq_processor_count(void) { volatile gic_dist *dist = ARM_GIC_DIST; @@ -306,3 +307,4 @@ uint32_t arm_gic_irq_processor_count(void) return cpu_count; } +#endif |