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| author | Joel Sherrill <joel.sherrill@oarcorp.com> | 2014-12-14 16:02:42 -0600 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@oarcorp.com> | 2015-01-04 13:44:57 -0600 |
| commit | 1ae7baf2d8d056430e5643eae5c9d776e26ef355 (patch) | |
| tree | 8697308c0ea51013180219135dd8d200ac316177 | |
| parent | pc386: Add BSP_ENABLE_COM1_COM4 BSP option (diff) | |
| download | rtems-1ae7baf2d8d056430e5643eae5c9d776e26ef355.tar.bz2 | |
clock_driver_simidle.c: Add BSP_CLOCK_DRIVER_DELAY
This allows the BSP to define an optional spin delay which is
useful for making time appear to pass at a rate closer to
wall time. On the Edison, this was used with a polled console
driver to slow polling to a reasonable rate and make time
pass reasonably close to correctly even with no clock tick
support.
| -rw-r--r-- | c/src/lib/libbsp/shared/clock_driver_simidle.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/shared/clock_driver_simidle.c b/c/src/lib/libbsp/shared/clock_driver_simidle.c index cfb9df5553..0f94b1e56b 100644 --- a/c/src/lib/libbsp/shared/clock_driver_simidle.c +++ b/c/src/lib/libbsp/shared/clock_driver_simidle.c @@ -31,6 +31,15 @@ volatile bool clock_driver_enabled; #include "clockdrv_shell.h" /* + * If this is defined, then the BSP has defined a delay of some sort so + * time passage appears somewhat correctly. Otherwise, it runs extremely + * fast with no delays. + */ +#ifndef BSP_CLOCK_DRIVER_DELAY +#define BSP_CLOCK_DRIVER_DELAY() +#endif + +/* * Since there is no interrupt on this simulator, let's just * fake time passing. This will not let preemption from an * interrupt work but is enough for many tests. @@ -46,6 +55,7 @@ Thread clock_driver_sim_idle_body( rtems_clock_tick(); _ISR_Nest_level--; _Thread_Enable_dispatch(); + BSP_CLOCK_DRIVER_DELAY(); } } return 0; /* to avoid warning */ |