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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-11-26 14:04:59 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-11-26 14:09:43 +0100
commit0a75a4aa65d3fdc5b79cfa4bc35c56aada2bf3ae (patch)
treec661dfc2d7f4716b6903c696b1bbea02a02cf1ff
parentrtems: Fix semaphore MPCI support (diff)
downloadrtems-0a75a4aa65d3fdc5b79cfa4bc35c56aada2bf3ae.tar.bz2
Remove rtems_cache_*_processor_set() functions
The following rtems_cache_*_processor_set() cache manager API functions are exotic, complex, very hard to use correctly, not used in the RTEMS code base, and apparently unused by applications. Close #3622.
-rw-r--r--bsps/shared/cache/cacheimpl.h91
-rw-r--r--cpukit/include/rtems/rtems/cache.h79
-rw-r--r--testsuites/smptests/smpcache01/init.c52
3 files changed, 7 insertions, 215 deletions
diff --git a/bsps/shared/cache/cacheimpl.h b/bsps/shared/cache/cacheimpl.h
index 7e9f863337..96dc3c0361 100644
--- a/bsps/shared/cache/cacheimpl.h
+++ b/bsps/shared/cache/cacheimpl.h
@@ -49,97 +49,6 @@
#error "CPU_INSTRUCTION_CACHE_ALIGNMENT is greater than CPU_CACHE_LINE_BYTES"
#endif
-#if defined(RTEMS_SMP)
-
-#include <rtems/score/smpimpl.h>
-
-typedef struct {
- const void *addr;
- size_t size;
-} smp_cache_area;
-
-#if defined(CPU_DATA_CACHE_ALIGNMENT)
-
-static void smp_cache_data_flush(void *arg)
-{
- smp_cache_area *area = arg;
-
- rtems_cache_flush_multiple_data_lines(area->addr, area->size);
-}
-
-static void smp_cache_data_inv(void *arg)
-{
- smp_cache_area *area = arg;
-
- rtems_cache_invalidate_multiple_data_lines(area->addr, area->size);
-}
-
-static void smp_cache_data_flush_all(void *arg)
-{
- rtems_cache_flush_entire_data();
-}
-
-static void smp_cache_data_inv_all(void *arg)
-{
- rtems_cache_invalidate_entire_data();
-}
-
-#endif /* defined(CPU_DATA_CACHE_ALIGNMENT) */
-
-void
-rtems_cache_flush_multiple_data_lines_processor_set(
- const void *addr,
- size_t size,
- const size_t setsize,
- const cpu_set_t *set
-)
-{
-#if defined(CPU_DATA_CACHE_ALIGNMENT)
- smp_cache_area area = { addr, size };
-
- _SMP_Multicast_action( setsize, set, smp_cache_data_flush, &area );
-#endif
-}
-
-void
-rtems_cache_invalidate_multiple_data_lines_processor_set(
- const void *addr,
- size_t size,
- const size_t setsize,
- const cpu_set_t *set
-)
-{
-#if defined(CPU_DATA_CACHE_ALIGNMENT)
- smp_cache_area area = { addr, size };
-
- _SMP_Multicast_action( setsize, set, smp_cache_data_inv, &area );
-#endif
-}
-
-void
-rtems_cache_flush_entire_data_processor_set(
- const size_t setsize,
- const cpu_set_t *set
-)
-{
-#if defined(CPU_DATA_CACHE_ALIGNMENT)
- _SMP_Multicast_action( setsize, set, smp_cache_data_flush_all, NULL );
-#endif
-}
-
-void
-rtems_cache_invalidate_entire_data_processor_set(
- const size_t setsize,
- const cpu_set_t *set
-)
-{
-#if defined(CPU_DATA_CACHE_ALIGNMENT)
- _SMP_Multicast_action( setsize, set, smp_cache_data_inv_all, NULL );
-#endif
-}
-
-#endif /* defined(RTEMS_SMP) */
-
/*
* THESE FUNCTIONS ONLY HAVE BODIES IF WE HAVE A DATA CACHE
*/
diff --git a/cpukit/include/rtems/rtems/cache.h b/cpukit/include/rtems/rtems/cache.h
index 16157b26e6..1e62c4270b 100644
--- a/cpukit/include/rtems/rtems/cache.h
+++ b/cpukit/include/rtems/rtems/cache.h
@@ -284,85 +284,6 @@ void rtems_cache_coherent_add_area(
uintptr_t area_size
);
-#if defined( RTEMS_SMP )
-
-/**
- * @brief Flushes multiple data cache lines for a set of processors
- *
- * Dirty cache lines covering the area are transferred to memory.
- * Depending on the cache implementation this may mark the lines as invalid.
- *
- * This operation should not be called from interrupt context.
- *
- * @param[in] addr The start address of the area to flush.
- * @param[in] size The size in bytes of the area to flush.
- * @param[in] setsize The size of the processor set.
- * @param[in] set The target processor set.
- */
-void rtems_cache_flush_multiple_data_lines_processor_set(
- const void *addr,
- size_t size,
- const size_t setsize,
- const cpu_set_t *set
-);
-
-/**
- * @brief Invalidates multiple data cache lines for a set of processors
- *
- * The cache lines covering the area are marked as invalid. A later read
- * access in the area will load the data from memory.
- *
- * In case the area is not aligned on cache line boundaries, then this
- * operation may destroy unrelated data.
- *
- * This operation should not be called from interrupt context.
- *
- * @param[in] addr The start address of the area to invalidate.
- * @param[in] size The size in bytes of the area to invalidate.
- * @param[in] setsize The size of the processor set.
- * @param[in] set The target processor set.
- */
-void rtems_cache_invalidate_multiple_data_lines_processor_set(
- const void *addr,
- size_t size,
- const size_t setsize,
- const cpu_set_t *set
-);
-
-/**
- * @brief Flushes the entire data cache for a set of processors
- *
- * This operation should not be called from interrupt context.
- *
- * @see rtems_cache_flush_multiple_data_lines().
- *
- * @param[in] setsize The size of the processor set.
- * @param[in] set The target processor set.
- */
-void rtems_cache_flush_entire_data_processor_set(
- const size_t setsize,
- const cpu_set_t *set
-);
-
-/**
- * @brief Invalidates the entire cache for a set of processors
- *
- * This function is responsible for performing a data cache
- * invalidate. It invalidates the entire cache for a set of
- * processors.
- *
- * This operation should not be called from interrupt context.
- *
- * @param[in] setsize The size of the processor set.
- * @param[in] set The target processor set.
- */
-void rtems_cache_invalidate_entire_data_processor_set(
- const size_t setsize,
- const cpu_set_t *set
-);
-
-#endif
-
/**@}*/
#ifdef __cplusplus
diff --git a/testsuites/smptests/smpcache01/init.c b/testsuites/smptests/smpcache01/init.c
index c3e58685b2..131b986050 100644
--- a/testsuites/smptests/smpcache01/init.c
+++ b/testsuites/smptests/smpcache01/init.c
@@ -23,8 +23,6 @@
const char rtems_test_name[] = "SMPCACHE 1";
-CPU_STRUCTURE_ALIGNMENT static int data_to_flush[1024];
-
#define CPU_COUNT 32
#define WORKER_PRIORITY 100
@@ -54,43 +52,12 @@ static void test_action( void *arg )
typedef void ( *test_case )(
size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
+ const cpu_set_t *cpu_set
);
-static void test_cache_flush_multiple_data_lines(
- size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
-)
-{
- rtems_cache_flush_multiple_data_lines_processor_set( &data_to_flush,
- sizeof(data_to_flush), set_size, cpu_set );
-}
-
-static void test_cache_invalidate_multiple_data_lines(
- size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
-)
-{
- rtems_cache_invalidate_multiple_data_lines_processor_set( &data_to_flush,
- sizeof(data_to_flush), set_size, cpu_set );
-}
-
-static void test_cache_flush_entire_data(
- size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
-)
-{
- rtems_cache_flush_entire_data_processor_set( set_size, cpu_set );
-}
-
static void test_cache_invalidate_entire_instruction(
size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
+ const cpu_set_t *cpu_set
)
{
rtems_cache_invalidate_entire_instruction();
@@ -98,8 +65,7 @@ static void test_cache_invalidate_entire_instruction(
static void test_cache_invalidate_multiple_instruction_lines(
size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
+ const cpu_set_t *cpu_set
)
{
uint32_t self = rtems_get_current_processor();
@@ -126,8 +92,7 @@ static void broadcast_test_init( void )
static void broadcast_test_body(
size_t set_size,
- const cpu_set_t *cpu_set,
- SMP_barrier_State *bs
+ const cpu_set_t *cpu_set
)
{
_SMP_Multicast_action( set_size, cpu_set, test_action, &ctx );
@@ -141,9 +106,6 @@ static void broadcast_test_fini( void )
}
static test_case test_cases[] = {
- test_cache_flush_multiple_data_lines,
- test_cache_invalidate_multiple_data_lines,
- test_cache_flush_entire_data,
test_cache_invalidate_entire_instruction,
test_cache_invalidate_multiple_instruction_lines,
broadcast_test_body
@@ -158,7 +120,7 @@ static void call_tests( size_t set_size,
for (i = 0; i < RTEMS_ARRAY_SIZE( test_cases ); ++i) {
barrier( bs );
- ( *test_cases[ i ] )( set_size, cpu_set, bs );
+ ( *test_cases[ i ] )( set_size, cpu_set );
barrier( bs );
}
@@ -177,7 +139,7 @@ static void call_tests_isr_disabled( size_t set_size,
_ISR_Local_disable( isr_level );
barrier( bs );
- ( *test_cases[ i ] )( set_size, cpu_set, bs );
+ ( *test_cases[ i ] )( set_size, cpu_set );
_ISR_Local_enable( isr_level );
barrier( bs );
}
@@ -197,7 +159,7 @@ static void call_tests_with_thread_dispatch_disabled( size_t set_size,
cpu_self = _Thread_Dispatch_disable();
barrier( bs );
- ( *test_cases[ i ] )( set_size, cpu_set, bs );
+ ( *test_cases[ i ] )( set_size, cpu_set );
barrier( bs );
_Thread_Dispatch_enable( cpu_self );
}